GPIO Simulation Results

Wednesday March 05 2025 15:08:10 UTC

GitHub Revision: 93c6c57959

Branch: darjeeling-dv

Testplan

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	gpio_smoke	1.810s	266.954us	1	1	100.00
		gpio_smoke_no_pullup_pulldown	1.920s	266.954us	1	1	100.00
		gpio_smoke_en_cdc_prim	1.970s	272.871us	1	1	100.00
		gpio_smoke_no_pullup_pulldown_en_cdc_prim	1.990s	272.871us	1	1	100.00
V1	csr_hw_reset	gpio_csr_hw_reset	1.410s	56.535us	1	1	100.00
V1	csr_rw	gpio_csr_rw	1.390s	44.160us	1	1	100.00
V1	csr_bit_bash	gpio_csr_bit_bash	2.660s	707.457us	1	1	100.00
V1	csr_aliasing	gpio_csr_aliasing	1.500s	90.536us	1	1	100.00
V1	csr_mem_rw_with_rand_reset	gpio_csr_mem_rw_with_rand_reset	1.510s	114.119us	1	1	100.00
V1	regwen_csr_and_corresponding_lockable_csr	gpio_csr_rw	1.390s	44.160us	1	1	100.00
		gpio_csr_aliasing	1.500s	90.536us	1	1	100.00
V1		TOTAL			9	9	100.00
V2	direct_and_masked_out	gpio_random_dout_din	1.760s	141.369us	1	1	100.00
		gpio_random_dout_din_no_pullup_pulldown	1.700s	141.369us	1	1	100.00
V2	out_in_regs_read_write	gpio_dout_din_regs_random_rw	1.500s	127.203us	1	1	100.00
V2	gpio_interrupt_programming	gpio_intr_rand_pgm	1.690s	235.370us	1	1	100.00
V2	random_interrupt_trigger	gpio_rand_intr_trigger	2.320s	395.580us	1	1	100.00
V2	interrupt_and_noise_filter	gpio_intr_with_filter_rand_intr_event	2.620s	231.620us	1	1	100.00
V2	noise_filter_stress	gpio_filter_stress	10.540s	1.930ms	1	1	100.00
V2	regs_long_reads_and_writes	gpio_random_long_reg_writes_reg_reads	3.380s	921.542us	1	1	100.00
V2	full_random	gpio_full_random	1.580s	207.953us	1	1	100.00
V2	stress_all	gpio_stress_all	1.389m	38.748ms	1	1	100.00
V2	alert_test	gpio_alert_test	1.500s	45.785us	1	1	100.00
V2	intr_test	gpio_intr_test	1.470s	40.785us	1	1	100.00
V2	tl_d_oob_addr_access	gpio_tl_errors	2.680s	443.330us	1	1	100.00
V2	tl_d_illegal_access	gpio_tl_errors	2.680s	443.330us	1	1	100.00
V2	tl_d_outstanding_access	gpio_csr_rw	1.390s	44.160us	1	1	100.00
		gpio_same_csr_outstanding	1.550s	99.077us	1	1	100.00
		gpio_csr_aliasing	1.500s	90.536us	1	1	100.00
		gpio_csr_hw_reset	1.410s	56.535us	1	1	100.00
V2	tl_d_partial_access	gpio_csr_rw	1.390s	44.160us	1	1	100.00
		gpio_same_csr_outstanding	1.550s	99.077us	1	1	100.00
		gpio_csr_aliasing	1.500s	90.536us	1	1	100.00
		gpio_csr_hw_reset	1.410s	56.535us	1	1	100.00
V2		TOTAL			14	14	100.00
V2S	tl_intg_err	gpio_tl_intg_err	1.840s	306.829us	1	1	100.00
		gpio_sec_cm	1.520s	254.579us	1	1	100.00
V2S	sec_cm_bus_integrity	gpio_tl_intg_err	1.840s	306.829us	1	1	100.00
V2S		TOTAL			2	2	100.00
V3	straps_data	gpio_rand_straps	1.370s	37.869us	1	1	100.00
V3	stress_all_with_rand_reset	gpio_stress_all_with_rand_reset	2.170s	252.662us	0	1	0.00
V3		TOTAL			1	2	50.00
		TOTAL			26	27	96.30

Failure Buckets

• UVM_FATAL sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -* has 1 failures:
  • Test gpio_stress_all_with_rand_reset has 1 failures.

    • 0.gpio_stress_all_with_rand_reset.1
      Line 73, in log /nightly/runs/scratch/darjeeling-dv/gpio-sim-vcs/0.gpio_stress_all_with_rand_reset/latest/run.log

        UVM_FATAL @ 252662076 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
        UVM_INFO @ 252662076 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---