| V1 |
smoke |
aon_timer_smoke |
2.550s |
486.873us |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
aon_timer_csr_hw_reset |
2.240s |
701.623us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
aon_timer_csr_rw |
2.110s |
329.773us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
aon_timer_csr_bit_bash |
7.340s |
11.357ms |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
aon_timer_csr_aliasing |
2.220s |
638.125us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
aon_timer_csr_mem_rw_with_rand_reset |
1.690s |
587.530us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
aon_timer_csr_rw |
2.110s |
329.773us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
2.220s |
638.125us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
aon_timer_mem_walk |
1.730s |
451.141us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
aon_timer_mem_partial_access |
2.060s |
499.989us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
prescaler |
aon_timer_prescaler |
16.730s |
41.556ms |
1 |
1 |
100.00 |
| V2 |
jump |
aon_timer_jump |
1.980s |
551.005us |
1 |
1 |
100.00 |
| V2 |
stress_all |
aon_timer_stress_all |
2.361m |
120.996ms |
1 |
1 |
100.00 |
| V2 |
intr_test |
aon_timer_intr_test |
1.650s |
321.476us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
aon_timer_tl_errors |
2.740s |
512.235us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
aon_timer_tl_errors |
2.740s |
512.235us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
aon_timer_csr_hw_reset |
2.240s |
701.623us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
2.110s |
329.773us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
2.220s |
638.125us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
2.180s |
1.321ms |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
aon_timer_csr_hw_reset |
2.240s |
701.623us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
2.110s |
329.773us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
2.220s |
638.125us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
2.180s |
1.321ms |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
6 |
6 |
100.00 |
| V2S |
tl_intg_err |
aon_timer_sec_cm |
6.050s |
3.575ms |
1 |
1 |
100.00 |
|
|
aon_timer_tl_intg_err |
12.090s |
8.073ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
aon_timer_tl_intg_err |
12.090s |
8.073ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
2 |
2 |
100.00 |
| V3 |
max_threshold |
aon_timer_smoke_max_thold |
1.910s |
690.309us |
1 |
1 |
100.00 |
| V3 |
min_threshold |
aon_timer_smoke_min_thold |
2.140s |
688.464us |
1 |
1 |
100.00 |
| V3 |
wkup_count_hi_cdc |
aon_timer_wkup_count_cdc_hi |
3.370s |
3.730ms |
1 |
1 |
100.00 |
| V3 |
custom_intr |
aon_timer_custom_intr |
2.220s |
521.910us |
1 |
1 |
100.00 |
| V3 |
alternating_on_off |
aon_timer_alternating_enable_on_off |
7.810s |
4.019ms |
1 |
1 |
100.00 |
| V3 |
stress_all_with_rand_reset |
aon_timer_stress_all_with_rand_reset |
8.560s |
2.219ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
6 |
6 |
100.00 |
|
Unmapped tests |
aon_timer_alert_test |
1.920s |
321.365us |
1 |
1 |
100.00 |
|
|
TOTAL |
|
|
23 |
23 |
100.00 |