| V1 |
smoke |
kmac_smoke |
42.700s |
3.233ms |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
kmac_csr_hw_reset |
2.100s |
109.557us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
kmac_csr_rw |
1.790s |
54.816us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
kmac_csr_bit_bash |
7.480s |
3.230ms |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
kmac_csr_aliasing |
6.190s |
535.523us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
kmac_csr_mem_rw_with_rand_reset |
2.670s |
300.216us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
kmac_csr_rw |
1.790s |
54.816us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
6.190s |
535.523us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
kmac_mem_walk |
1.680s |
49.007us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
kmac_mem_partial_access |
1.980s |
143.910us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
long_msg_and_output |
kmac_long_msg_and_output |
14.914m |
23.235ms |
1 |
1 |
100.00 |
| V2 |
burst_write |
kmac_burst_write |
15.095m |
94.503ms |
1 |
1 |
100.00 |
| V2 |
test_vectors |
kmac_test_vectors_sha3_224 |
34.340s |
6.862ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_256 |
28.931m |
231.635ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_384 |
24.950s |
8.594ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_512 |
12.590s |
1.093ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_shake_128 |
26.521m |
44.273ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_shake_256 |
1.452m |
10.712ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_kmac |
2.980s |
94.911us |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_kmac_xof |
3.700s |
52.099us |
1 |
1 |
100.00 |
| V2 |
sideload |
kmac_sideload |
2.903m |
20.215ms |
1 |
1 |
100.00 |
| V2 |
app |
kmac_app |
3.462m |
24.089ms |
1 |
1 |
100.00 |
| V2 |
app_with_partial_data |
kmac_app_with_partial_data |
3.595m |
5.633ms |
1 |
1 |
100.00 |
| V2 |
entropy_refresh |
kmac_entropy_refresh |
2.398m |
6.905ms |
1 |
1 |
100.00 |
| V2 |
error |
kmac_error |
2.517m |
6.070ms |
1 |
1 |
100.00 |
| V2 |
key_error |
kmac_key_error |
5.880s |
1.724ms |
1 |
1 |
100.00 |
| V2 |
sideload_invalid |
kmac_sideload_invalid |
7.690s |
920.846us |
1 |
1 |
100.00 |
| V2 |
edn_timeout_error |
kmac_edn_timeout_error |
1.860s |
124.185us |
1 |
1 |
100.00 |
| V2 |
entropy_mode_error |
kmac_entropy_mode_error |
1.650s |
47.925us |
1 |
1 |
100.00 |
| V2 |
entropy_ready_error |
kmac_entropy_ready_error |
1.033m |
11.261ms |
1 |
1 |
100.00 |
| V2 |
lc_escalation |
kmac_lc_escalation |
2.130s |
63.953us |
1 |
1 |
100.00 |
| V2 |
stress_all |
kmac_stress_all |
18.264m |
85.555ms |
1 |
1 |
100.00 |
| V2 |
intr_test |
kmac_intr_test |
2.020s |
25.676us |
1 |
1 |
100.00 |
| V2 |
alert_test |
kmac_alert_test |
1.780s |
18.049us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
kmac_tl_errors |
3.440s |
870.150us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
kmac_tl_errors |
3.440s |
870.150us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
kmac_csr_hw_reset |
2.100s |
109.557us |
1 |
1 |
100.00 |
|
|
kmac_csr_rw |
1.790s |
54.816us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
6.190s |
535.523us |
1 |
1 |
100.00 |
|
|
kmac_same_csr_outstanding |
2.180s |
229.335us |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
kmac_csr_hw_reset |
2.100s |
109.557us |
1 |
1 |
100.00 |
|
|
kmac_csr_rw |
1.790s |
54.816us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
6.190s |
535.523us |
1 |
1 |
100.00 |
|
|
kmac_same_csr_outstanding |
2.180s |
229.335us |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
26 |
26 |
100.00 |
| V2S |
shadow_reg_update_error |
kmac_shadow_reg_errors |
2.150s |
49.254us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_read_clear_staged_value |
kmac_shadow_reg_errors |
2.150s |
49.254us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_storage_error |
kmac_shadow_reg_errors |
2.150s |
49.254us |
1 |
1 |
100.00 |
| V2S |
shadowed_reset_glitch |
kmac_shadow_reg_errors |
2.150s |
49.254us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_update_error_with_csr_rw |
kmac_shadow_reg_errors_with_csr_rw |
3.340s |
220.397us |
1 |
1 |
100.00 |
| V2S |
tl_intg_err |
kmac_sec_cm |
29.570s |
10.229ms |
1 |
1 |
100.00 |
|
|
kmac_tl_intg_err |
3.970s |
3.058ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
kmac_tl_intg_err |
3.970s |
3.058ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_lc_escalate_en_intersig_mubi |
kmac_lc_escalation |
2.130s |
63.953us |
1 |
1 |
100.00 |
| V2S |
sec_cm_sw_key_key_masking |
kmac_smoke |
42.700s |
3.233ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_key_sideload |
kmac_sideload |
2.903m |
20.215ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_cfg_shadowed_config_shadow |
kmac_shadow_reg_errors |
2.150s |
49.254us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_sparse |
kmac_sec_cm |
29.570s |
10.229ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_ctr_redun |
kmac_sec_cm |
29.570s |
10.229ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_packer_ctr_redun |
kmac_sec_cm |
29.570s |
10.229ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_cfg_shadowed_config_regwen |
kmac_smoke |
42.700s |
3.233ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_global_esc |
kmac_lc_escalation |
2.130s |
63.953us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_local_esc |
kmac_sec_cm |
29.570s |
10.229ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_absorbed_ctrl_mubi |
kmac_mubi |
12.310s |
763.817us |
1 |
1 |
100.00 |
| V2S |
sec_cm_sw_cmd_ctrl_sparse |
kmac_smoke |
42.700s |
3.233ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
5 |
5 |
100.00 |
| V3 |
stress_all_with_rand_reset |
kmac_stress_all_with_rand_reset |
33.930s |
1.466ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
1 |
1 |
100.00 |
|
|
TOTAL |
|
|
40 |
40 |
100.00 |