| V1 |
smoke |
keymgr_dpe_smoke |
15.030s |
4.562ms |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
keymgr_dpe_csr_hw_reset |
2.070s |
91.367us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
keymgr_dpe_csr_rw |
1.870s |
51.819us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
keymgr_dpe_csr_bit_bash |
4.550s |
307.431us |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
keymgr_dpe_csr_aliasing |
6.630s |
879.097us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
keymgr_dpe_csr_mem_rw_with_rand_reset |
1.980s |
89.275us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
keymgr_dpe_csr_rw |
1.870s |
51.819us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_csr_aliasing |
6.630s |
879.097us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
6 |
6 |
100.00 |
| V2 |
intr_test |
keymgr_dpe_intr_test |
1.670s |
46.696us |
1 |
1 |
100.00 |
| V2 |
alert_test |
keymgr_dpe_alert_test |
1.740s |
11.286us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
keymgr_dpe_tl_errors |
2.840s |
31.478us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
keymgr_dpe_tl_errors |
2.840s |
31.478us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
keymgr_dpe_csr_hw_reset |
2.070s |
91.367us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_csr_rw |
1.870s |
51.819us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_csr_aliasing |
6.630s |
879.097us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_same_csr_outstanding |
2.620s |
32.357us |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
keymgr_dpe_csr_hw_reset |
2.070s |
91.367us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_csr_rw |
1.870s |
51.819us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_csr_aliasing |
6.630s |
879.097us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_same_csr_outstanding |
2.620s |
32.357us |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
4 |
4 |
100.00 |
| V2S |
tl_intg_err |
keymgr_dpe_sec_cm |
5.890s |
936.328us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_tl_intg_err |
3.070s |
189.071us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_update_error |
keymgr_dpe_shadow_reg_errors |
2.450s |
240.827us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_read_clear_staged_value |
keymgr_dpe_shadow_reg_errors |
2.450s |
240.827us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_storage_error |
keymgr_dpe_shadow_reg_errors |
2.450s |
240.827us |
1 |
1 |
100.00 |
| V2S |
shadowed_reset_glitch |
keymgr_dpe_shadow_reg_errors |
2.450s |
240.827us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_update_error_with_csr_rw |
keymgr_dpe_shadow_reg_errors_with_csr_rw |
4.870s |
921.981us |
1 |
1 |
100.00 |
| V2S |
prim_count_check |
keymgr_dpe_sec_cm |
5.890s |
936.328us |
1 |
1 |
100.00 |
| V2S |
prim_fsm_check |
keymgr_dpe_sec_cm |
5.890s |
936.328us |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
4 |
4 |
100.00 |
|
|
TOTAL |
|
|
14 |
14 |
100.00 |