KEYMGR_DPE Simulation Results

Wednesday April 16 2025 17:02:56 UTC

GitHub Revision: d6a1303

Branch: master

Testplan

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	keymgr_dpe_smoke	8.300s	159.865us	1	1	100.00
V1	csr_hw_reset	keymgr_dpe_csr_hw_reset	2.050s	179.651us	1	1	100.00
V1	csr_rw	keymgr_dpe_csr_rw	1.890s	15.115us	1	1	100.00
V1	csr_bit_bash	keymgr_dpe_csr_bit_bash	8.630s	749.049us	1	1	100.00
V1	csr_aliasing	keymgr_dpe_csr_aliasing	4.380s	308.766us	1	1	100.00
V1	csr_mem_rw_with_rand_reset	keymgr_dpe_csr_mem_rw_with_rand_reset	2.410s	18.314us	1	1	100.00
V1	regwen_csr_and_corresponding_lockable_csr	keymgr_dpe_csr_rw	1.890s	15.115us	1	1	100.00
		keymgr_dpe_csr_aliasing	4.380s	308.766us	1	1	100.00
V1		TOTAL			6	6	100.00
V2	intr_test	keymgr_dpe_intr_test	1.620s	19.714us	1	1	100.00
V2	alert_test	keymgr_dpe_alert_test	1.850s	20.734us	1	1	100.00
V2	tl_d_oob_addr_access	keymgr_dpe_tl_errors	3.020s	286.724us	1	1	100.00
V2	tl_d_illegal_access	keymgr_dpe_tl_errors	3.020s	286.724us	1	1	100.00
V2	tl_d_outstanding_access	keymgr_dpe_csr_hw_reset	2.050s	179.651us	1	1	100.00
		keymgr_dpe_csr_rw	1.890s	15.115us	1	1	100.00
		keymgr_dpe_csr_aliasing	4.380s	308.766us	1	1	100.00
		keymgr_dpe_same_csr_outstanding	2.280s	40.586us	1	1	100.00
V2	tl_d_partial_access	keymgr_dpe_csr_hw_reset	2.050s	179.651us	1	1	100.00
		keymgr_dpe_csr_rw	1.890s	15.115us	1	1	100.00
		keymgr_dpe_csr_aliasing	4.380s	308.766us	1	1	100.00
		keymgr_dpe_same_csr_outstanding	2.280s	40.586us	1	1	100.00
V2		TOTAL			4	4	100.00
V2S	tl_intg_err	keymgr_dpe_sec_cm	7.040s	434.832us	1	1	100.00
		keymgr_dpe_tl_intg_err	3.690s	573.072us	1	1	100.00
V2S	shadow_reg_update_error	keymgr_dpe_shadow_reg_errors	1.960s	83.261us	1	1	100.00
V2S	shadow_reg_read_clear_staged_value	keymgr_dpe_shadow_reg_errors	1.960s	83.261us	1	1	100.00
V2S	shadow_reg_storage_error	keymgr_dpe_shadow_reg_errors	1.960s	83.261us	1	1	100.00
V2S	shadowed_reset_glitch	keymgr_dpe_shadow_reg_errors	1.960s	83.261us	1	1	100.00
V2S	shadow_reg_update_error_with_csr_rw	keymgr_dpe_shadow_reg_errors_with_csr_rw	5.450s	119.943us	1	1	100.00
V2S	prim_count_check	keymgr_dpe_sec_cm	7.040s	434.832us	1	1	100.00
V2S	prim_fsm_check	keymgr_dpe_sec_cm	7.040s	434.832us	1	1	100.00
V2S		TOTAL			4	4	100.00
		TOTAL			14	14	100.00