| V1 |
smoke |
aon_timer_smoke |
2.510s |
640.544us |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
aon_timer_csr_hw_reset |
1.670s |
773.593us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
aon_timer_csr_rw |
1.770s |
409.161us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
aon_timer_csr_bit_bash |
10.190s |
7.067ms |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
aon_timer_csr_aliasing |
2.270s |
585.218us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
aon_timer_csr_mem_rw_with_rand_reset |
1.950s |
487.899us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
aon_timer_csr_rw |
1.770s |
409.161us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
2.270s |
585.218us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
aon_timer_mem_walk |
1.790s |
564.450us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
aon_timer_mem_partial_access |
2.080s |
490.812us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
prescaler |
aon_timer_prescaler |
2.160s |
740.421us |
1 |
1 |
100.00 |
| V2 |
jump |
aon_timer_jump |
2.340s |
721.240us |
1 |
1 |
100.00 |
| V2 |
stress_all |
aon_timer_stress_all |
2.160s |
3.572ms |
1 |
1 |
100.00 |
| V2 |
intr_test |
aon_timer_intr_test |
1.630s |
550.691us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
aon_timer_tl_errors |
2.440s |
747.696us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
aon_timer_tl_errors |
2.440s |
747.696us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
aon_timer_csr_hw_reset |
1.670s |
773.593us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
1.770s |
409.161us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
2.270s |
585.218us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
5.020s |
2.341ms |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
aon_timer_csr_hw_reset |
1.670s |
773.593us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
1.770s |
409.161us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
2.270s |
585.218us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
5.020s |
2.341ms |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
6 |
6 |
100.00 |
| V2S |
tl_intg_err |
aon_timer_sec_cm |
12.250s |
7.521ms |
1 |
1 |
100.00 |
|
|
aon_timer_tl_intg_err |
6.640s |
4.099ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
aon_timer_tl_intg_err |
6.640s |
4.099ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
2 |
2 |
100.00 |
| V3 |
max_threshold |
aon_timer_smoke_max_thold |
1.780s |
497.475us |
1 |
1 |
100.00 |
| V3 |
min_threshold |
aon_timer_smoke_min_thold |
1.870s |
498.622us |
1 |
1 |
100.00 |
| V3 |
wkup_count_hi_cdc |
aon_timer_wkup_count_cdc_hi |
7.920s |
3.366ms |
1 |
1 |
100.00 |
| V3 |
custom_intr |
aon_timer_custom_intr |
2.070s |
628.122us |
1 |
1 |
100.00 |
| V3 |
alternating_on_off |
aon_timer_alternating_enable_on_off |
7.710s |
4.176ms |
1 |
1 |
100.00 |
| V3 |
stress_all_with_rand_reset |
aon_timer_stress_all_with_rand_reset |
5.850s |
1.449ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
6 |
6 |
100.00 |
|
Unmapped tests |
aon_timer_alert_test |
2.020s |
492.709us |
1 |
1 |
100.00 |
|
|
TOTAL |
|
|
23 |
23 |
100.00 |