| V1 |
smoke |
keymgr_dpe_smoke |
8.640s |
467.382us |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
keymgr_dpe_csr_hw_reset |
1.800s |
20.048us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
keymgr_dpe_csr_rw |
1.690s |
16.570us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
keymgr_dpe_csr_bit_bash |
9.280s |
3.381ms |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
keymgr_dpe_csr_aliasing |
4.850s |
82.565us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
keymgr_dpe_csr_mem_rw_with_rand_reset |
2.230s |
27.098us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
keymgr_dpe_csr_rw |
1.690s |
16.570us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_csr_aliasing |
4.850s |
82.565us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
6 |
6 |
100.00 |
| V2 |
intr_test |
keymgr_dpe_intr_test |
1.560s |
15.779us |
1 |
1 |
100.00 |
| V2 |
alert_test |
keymgr_dpe_alert_test |
1.730s |
44.720us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
keymgr_dpe_tl_errors |
1.940s |
41.155us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
keymgr_dpe_tl_errors |
1.940s |
41.155us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
keymgr_dpe_csr_hw_reset |
1.800s |
20.048us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_csr_rw |
1.690s |
16.570us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_csr_aliasing |
4.850s |
82.565us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_same_csr_outstanding |
2.250s |
50.473us |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
keymgr_dpe_csr_hw_reset |
1.800s |
20.048us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_csr_rw |
1.690s |
16.570us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_csr_aliasing |
4.850s |
82.565us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_same_csr_outstanding |
2.250s |
50.473us |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
4 |
4 |
100.00 |
| V2S |
tl_intg_err |
keymgr_dpe_sec_cm |
4.640s |
463.146us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_tl_intg_err |
5.080s |
237.987us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_update_error |
keymgr_dpe_shadow_reg_errors |
2.750s |
423.860us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_read_clear_staged_value |
keymgr_dpe_shadow_reg_errors |
2.750s |
423.860us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_storage_error |
keymgr_dpe_shadow_reg_errors |
2.750s |
423.860us |
1 |
1 |
100.00 |
| V2S |
shadowed_reset_glitch |
keymgr_dpe_shadow_reg_errors |
2.750s |
423.860us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_update_error_with_csr_rw |
keymgr_dpe_shadow_reg_errors_with_csr_rw |
4.460s |
205.858us |
1 |
1 |
100.00 |
| V2S |
prim_count_check |
keymgr_dpe_sec_cm |
4.640s |
463.146us |
1 |
1 |
100.00 |
| V2S |
prim_fsm_check |
keymgr_dpe_sec_cm |
4.640s |
463.146us |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
4 |
4 |
100.00 |
|
|
TOTAL |
|
|
14 |
14 |
100.00 |