35aa874| Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
|---|---|---|---|---|---|---|---|
| V1 | mbx_smoke | mbx_smoke | 36.000s | 1.499ms | 1 | 1 | 100.00 |
| V1 | csr_hw_reset | mbx_csr_hw_reset | 3.000s | 93.239us | 1 | 1 | 100.00 |
| V1 | csr_rw | mbx_csr_rw | 4.000s | 29.513us | 1 | 1 | 100.00 |
| V1 | csr_bit_bash | mbx_csr_bit_bash | 4.000s | 91.715us | 1 | 1 | 100.00 |
| V1 | csr_aliasing | mbx_csr_aliasing | 4.000s | 37.289us | 1 | 1 | 100.00 |
| V1 | csr_mem_rw_with_rand_reset | mbx_csr_mem_rw_with_rand_reset | 4.000s | 1.077us | 0 | 1 | 0.00 |
| V1 | regwen_csr_and_corresponding_lockable_csr | mbx_csr_rw | 4.000s | 29.513us | 1 | 1 | 100.00 |
| mbx_csr_aliasing | 4.000s | 37.289us | 1 | 1 | 100.00 | ||
| V1 | TOTAL | 5 | 6 | 83.33 | |||
| V2 | mbx_stress | mbx_stress | 10.000s | 2.099ms | 0 | 1 | 0.00 |
| mbx_stress_zero_delays | 29.000s | 652.098us | 1 | 1 | 100.00 | ||
| V2 | mbx_imbx_oob | mbx_imbx_oob | 23.000s | 7.561ms | 1 | 1 | 100.00 |
| V2 | alert_test | mbx_alert_test | 4.000s | 11.873us | 1 | 1 | 100.00 |
| V2 | tl_d_oob_addr_access | mbx_tl_errors | 4.000s | 4.246us | 0 | 1 | 0.00 |
| V2 | tl_d_illegal_access | mbx_tl_errors | 4.000s | 4.246us | 0 | 1 | 0.00 |
| V2 | tl_d_outstanding_access | mbx_csr_hw_reset | 3.000s | 93.239us | 1 | 1 | 100.00 |
| mbx_csr_rw | 4.000s | 29.513us | 1 | 1 | 100.00 | ||
| mbx_csr_aliasing | 4.000s | 37.289us | 1 | 1 | 100.00 | ||
| mbx_same_csr_outstanding | 4.000s | 20.911us | 1 | 1 | 100.00 | ||
| V2 | tl_d_partial_access | mbx_csr_hw_reset | 3.000s | 93.239us | 1 | 1 | 100.00 |
| mbx_csr_rw | 4.000s | 29.513us | 1 | 1 | 100.00 | ||
| mbx_csr_aliasing | 4.000s | 37.289us | 1 | 1 | 100.00 | ||
| mbx_same_csr_outstanding | 4.000s | 20.911us | 1 | 1 | 100.00 | ||
| V2 | TOTAL | 4 | 6 | 66.67 | |||
| V2S | tl_intg_err | mbx_sec_cm | 4.000s | 17.921us | 1 | 1 | 100.00 |
| mbx_tl_intg_err | 4.000s | 7.151us | 0 | 1 | 0.00 | ||
| V2S | TOTAL | 1 | 2 | 50.00 | |||
| TOTAL | 10 | 14 | 71.43 |
xmsim: *E,ASRTST (/nightly/runs/scratch/master/mbx-sim-xcelium/default/src/lowrisc_ip_mbx_*/rtl/mbx_ombx.sv,286): Assertion ReadyAssertedWhenRead_A has failed has 1 failures:
0.mbx_stress.54662736030563559460576757841825684356264265552992082956575322163178970944039
Line 106, in log /nightly/runs/scratch/master/mbx-sim-xcelium/0.mbx_stress/latest/run.log
xmsim: *E,ASRTST (/nightly/runs/scratch/master/mbx-sim-xcelium/default/src/lowrisc_ip_mbx_0.1/rtl/mbx_ombx.sv,286): (time 2099342008 PS) Assertion tb.dut.u_ombx.ReadyAssertedWhenRead_A has failed
UVM_ERROR @ 2099342008 ps: (mbx_ombx.sv:286) [ASSERT FAILED] ReadyAssertedWhenRead_A
UVM_INFO @ 2099342008 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (tl_host_seq.sv:55) sequencer [tl_seq] fail to find matching req for rsp[*]: a_addr = * a_data = * a_mask = * a_size = * a_param = * a_source = * a_opcode = PutFullData a_user = * d_data = * d_size = * d_param = * d_source = * d_opcode = AccessAck d_error = * d_user = * d_sink = * req_abort_after_a_valid_len = * rsp_abort_after_d_valid_len = * req_completed = * rsp_completed = * has 1 failures:
0.mbx_tl_errors.20973418498938307451970669009076962183312002190025595255776451698037480616827
Line 82, in log /nightly/runs/scratch/master/mbx-sim-xcelium/0.mbx_tl_errors/latest/run.log
UVM_ERROR @ 4246256 ps: (tl_host_seq.sv:55) uvm_test_top.env.m_tl_agent_mbx_mem_reg_block.sequencer [uvm_test_top.env.virtual_sequencer._item.tl_seq] fail to find matching req for rsp[0]: a_addr = 0x79793394 a_data = 0xf3beab5e a_mask = 0xf a_size = 0x2 a_param = 0x0 a_source = 0x23 a_opcode = PutFullData a_user = 0x2c0b7 d_data = 0xdf43246e d_size = 0x1 d_param = 0x0 d_source = 0xef d_opcode = AccessAck d_error = 0 d_user = 111101100011 d_sink = 1 req_abort_after_a_valid_len = 0 rsp_abort_after_d_valid_len = 0 req_completed = 0 rsp_completed = 1
UVM_INFO @ 4246256 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (tl_host_seq.sv:55) sequencer [tl_seq] fail to find matching req for rsp[*]: a_addr = * a_data = * a_mask = * a_size = * a_param = * a_source = * a_opcode = PutFullData a_user = * d_data = * d_size = * d_param = * d_source = * d_opcode = AccessAckData d_error = * d_user = * d_sink = * req_abort_after_a_valid_len = * rsp_abort_after_d_valid_len = * req_completed = * rsp_completed = * has 1 failures:
0.mbx_tl_intg_err.109066110671431317103029074267310525102466577821337125536107348915629592223390
Line 95, in log /nightly/runs/scratch/master/mbx-sim-xcelium/0.mbx_tl_intg_err/latest/run.log
UVM_ERROR @ 7150951 ps: (tl_host_seq.sv:55) uvm_test_top.env.m_tl_agent_mbx_mem_reg_block.sequencer [uvm_test_top.env.virtual_sequencer._item.tl_seq] fail to find matching req for rsp[0]: a_addr = 0xd70f6060 a_data = 0xc9002705 a_mask = 0x3 a_size = 0x1 a_param = 0x0 a_source = 0x74 a_opcode = PutFullData a_user = 0x262b0 d_data = 0x9c4e6cdb d_size = 0x1 d_param = 0x0 d_source = 0x84 d_opcode = AccessAckData d_error = 0 d_user = 11111000011 d_sink = 0 req_abort_after_a_valid_len = 0 rsp_abort_after_d_valid_len = 0 req_completed = 0 rsp_completed = 1
UVM_INFO @ 7150951 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (tl_host_seq.sv:55) sequencer [tl_seq] fail to find matching req for rsp[*]: a_addr = * a_data = * a_mask = * a_size = * a_param = * a_source = * a_opcode = PutPartialData a_user = * d_data = * d_size = * d_param = * d_source = * d_opcode = AccessAck d_error = * d_user = * d_sink = * req_abort_after_a_valid_len = * rsp_abort_after_d_valid_len = * req_completed = * rsp_completed = * has 1 failures:
0.mbx_csr_mem_rw_with_rand_reset.92649425027083742206030434063272952837606623394339980706020739413062925788359
Line 83, in log /nightly/runs/scratch/master/mbx-sim-xcelium/0.mbx_csr_mem_rw_with_rand_reset/latest/run.log
UVM_ERROR @ 1077074 ps: (tl_host_seq.sv:55) uvm_test_top.env.m_tl_agent_mbx_mem_reg_block.sequencer [uvm_test_top.env.virtual_sequencer._item.tl_seq] fail to find matching req for rsp[0]: a_addr = 0x7d049b3c a_data = 0xefb1757e a_mask = 0xf a_size = 0x2 a_param = 0x0 a_source = 0x28 a_opcode = PutPartialData a_user = 0x109ff d_data = 0xd255c029 d_size = 0x3 d_param = 0x0 d_source = 0x4c d_opcode = AccessAck d_error = 0 d_user = 11011111011110 d_sink = 0 req_abort_after_a_valid_len = 0 rsp_abort_after_d_valid_len = 0 req_completed = 0 rsp_completed = 1
UVM_INFO @ 1077074 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---