| V1 |
smoke |
kmac_smoke |
1.042m |
13.519ms |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
kmac_csr_hw_reset |
1.770s |
19.263us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
kmac_csr_rw |
1.810s |
96.845us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
kmac_csr_bit_bash |
7.560s |
5.994ms |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
kmac_csr_aliasing |
4.210s |
276.016us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
kmac_csr_mem_rw_with_rand_reset |
2.830s |
124.817us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
kmac_csr_rw |
1.810s |
96.845us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
4.210s |
276.016us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
kmac_mem_walk |
1.600s |
14.202us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
kmac_mem_partial_access |
2.050s |
133.427us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
long_msg_and_output |
kmac_long_msg_and_output |
28.137m |
46.198ms |
1 |
1 |
100.00 |
| V2 |
burst_write |
kmac_burst_write |
8.410s |
232.428us |
1 |
1 |
100.00 |
| V2 |
test_vectors |
kmac_test_vectors_sha3_224 |
29.160s |
4.813ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_256 |
38.010s |
1.395ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_384 |
21.680s |
1.485ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_512 |
16.822m |
30.900ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_shake_128 |
35.201m |
439.581ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_shake_256 |
24.764m |
34.836ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_kmac |
3.380s |
143.085us |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_kmac_xof |
3.500s |
354.698us |
1 |
1 |
100.00 |
| V2 |
sideload |
kmac_sideload |
44.260s |
1.741ms |
1 |
1 |
100.00 |
| V2 |
app |
kmac_app |
3.070m |
43.313ms |
1 |
1 |
100.00 |
| V2 |
app_with_partial_data |
kmac_app_with_partial_data |
2.477m |
10.286ms |
1 |
1 |
100.00 |
| V2 |
entropy_refresh |
kmac_entropy_refresh |
4.924m |
13.583ms |
1 |
1 |
100.00 |
| V2 |
error |
kmac_error |
1.571m |
1.747ms |
1 |
1 |
100.00 |
| V2 |
key_error |
kmac_key_error |
12.780s |
4.375ms |
1 |
1 |
100.00 |
| V2 |
sideload_invalid |
kmac_sideload_invalid |
4.890s |
596.333us |
1 |
1 |
100.00 |
| V2 |
edn_timeout_error |
kmac_edn_timeout_error |
2.260s |
34.691us |
1 |
1 |
100.00 |
| V2 |
entropy_mode_error |
kmac_entropy_mode_error |
1.870s |
347.186us |
1 |
1 |
100.00 |
| V2 |
entropy_ready_error |
kmac_entropy_ready_error |
16.910s |
1.899ms |
1 |
1 |
100.00 |
| V2 |
lc_escalation |
kmac_lc_escalation |
5.130s |
230.729us |
1 |
1 |
100.00 |
| V2 |
stress_all |
kmac_stress_all |
2.971m |
11.126ms |
1 |
1 |
100.00 |
| V2 |
intr_test |
kmac_intr_test |
1.720s |
39.523us |
1 |
1 |
100.00 |
| V2 |
alert_test |
kmac_alert_test |
1.840s |
30.202us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
kmac_tl_errors |
2.790s |
332.186us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
kmac_tl_errors |
2.790s |
332.186us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
kmac_csr_hw_reset |
1.770s |
19.263us |
1 |
1 |
100.00 |
|
|
kmac_csr_rw |
1.810s |
96.845us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
4.210s |
276.016us |
1 |
1 |
100.00 |
|
|
kmac_same_csr_outstanding |
2.900s |
631.904us |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
kmac_csr_hw_reset |
1.770s |
19.263us |
1 |
1 |
100.00 |
|
|
kmac_csr_rw |
1.810s |
96.845us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
4.210s |
276.016us |
1 |
1 |
100.00 |
|
|
kmac_same_csr_outstanding |
2.900s |
631.904us |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
26 |
26 |
100.00 |
| V2S |
shadow_reg_update_error |
kmac_shadow_reg_errors |
2.020s |
499.222us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_read_clear_staged_value |
kmac_shadow_reg_errors |
2.020s |
499.222us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_storage_error |
kmac_shadow_reg_errors |
2.020s |
499.222us |
1 |
1 |
100.00 |
| V2S |
shadowed_reset_glitch |
kmac_shadow_reg_errors |
2.020s |
499.222us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_update_error_with_csr_rw |
kmac_shadow_reg_errors_with_csr_rw |
3.550s |
86.779us |
1 |
1 |
100.00 |
| V2S |
tl_intg_err |
kmac_sec_cm |
32.690s |
7.252ms |
1 |
1 |
100.00 |
|
|
kmac_tl_intg_err |
3.860s |
98.510us |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
kmac_tl_intg_err |
3.860s |
98.510us |
1 |
1 |
100.00 |
| V2S |
sec_cm_lc_escalate_en_intersig_mubi |
kmac_lc_escalation |
5.130s |
230.729us |
1 |
1 |
100.00 |
| V2S |
sec_cm_sw_key_key_masking |
kmac_smoke |
1.042m |
13.519ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_key_sideload |
kmac_sideload |
44.260s |
1.741ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_cfg_shadowed_config_shadow |
kmac_shadow_reg_errors |
2.020s |
499.222us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_sparse |
kmac_sec_cm |
32.690s |
7.252ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_ctr_redun |
kmac_sec_cm |
32.690s |
7.252ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_packer_ctr_redun |
kmac_sec_cm |
32.690s |
7.252ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_cfg_shadowed_config_regwen |
kmac_smoke |
1.042m |
13.519ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_global_esc |
kmac_lc_escalation |
5.130s |
230.729us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_local_esc |
kmac_sec_cm |
32.690s |
7.252ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_absorbed_ctrl_mubi |
kmac_mubi |
1.024m |
14.974ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_sw_cmd_ctrl_sparse |
kmac_smoke |
1.042m |
13.519ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
5 |
5 |
100.00 |
| V3 |
stress_all_with_rand_reset |
kmac_stress_all_with_rand_reset |
27.500s |
3.306ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
1 |
1 |
100.00 |
|
|
TOTAL |
|
|
40 |
40 |
100.00 |