KEYMGR_DPE Simulation Results

Wednesday May 07 2025 17:02:37 UTC

GitHub Revision: 3add6b6

Branch: master

Testplan

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	keymgr_dpe_smoke	13.490s	1.116ms	1	1	100.00
V1	csr_hw_reset	keymgr_dpe_csr_hw_reset	1.770s	30.487us	1	1	100.00
V1	csr_rw	keymgr_dpe_csr_rw	1.920s	103.787us	1	1	100.00
V1	csr_bit_bash	keymgr_dpe_csr_bit_bash	5.850s	2.386ms	1	1	100.00
V1	csr_aliasing	keymgr_dpe_csr_aliasing	5.130s	301.733us	1	1	100.00
V1	csr_mem_rw_with_rand_reset	keymgr_dpe_csr_mem_rw_with_rand_reset	1.930s	128.044us	1	1	100.00
V1	regwen_csr_and_corresponding_lockable_csr	keymgr_dpe_csr_rw	1.920s	103.787us	1	1	100.00
		keymgr_dpe_csr_aliasing	5.130s	301.733us	1	1	100.00
V1		TOTAL			6	6	100.00
V2	intr_test	keymgr_dpe_intr_test	1.910s	10.666us	1	1	100.00
V2	alert_test	keymgr_dpe_alert_test	1.670s	33.921us	1	1	100.00
V2	tl_d_oob_addr_access	keymgr_dpe_tl_errors	2.460s	104.893us	1	1	100.00
V2	tl_d_illegal_access	keymgr_dpe_tl_errors	2.460s	104.893us	1	1	100.00
V2	tl_d_outstanding_access	keymgr_dpe_csr_hw_reset	1.770s	30.487us	1	1	100.00
		keymgr_dpe_csr_rw	1.920s	103.787us	1	1	100.00
		keymgr_dpe_csr_aliasing	5.130s	301.733us	1	1	100.00
		keymgr_dpe_same_csr_outstanding	1.990s	177.219us	1	1	100.00
V2	tl_d_partial_access	keymgr_dpe_csr_hw_reset	1.770s	30.487us	1	1	100.00
		keymgr_dpe_csr_rw	1.920s	103.787us	1	1	100.00
		keymgr_dpe_csr_aliasing	5.130s	301.733us	1	1	100.00
		keymgr_dpe_same_csr_outstanding	1.990s	177.219us	1	1	100.00
V2		TOTAL			4	4	100.00
V2S	tl_intg_err	keymgr_dpe_sec_cm	14.650s	2.583ms	1	1	100.00
		keymgr_dpe_tl_intg_err	4.900s	208.245us	1	1	100.00
V2S	shadow_reg_update_error	keymgr_dpe_shadow_reg_errors	2.670s	124.807us	1	1	100.00
V2S	shadow_reg_read_clear_staged_value	keymgr_dpe_shadow_reg_errors	2.670s	124.807us	1	1	100.00
V2S	shadow_reg_storage_error	keymgr_dpe_shadow_reg_errors	2.670s	124.807us	1	1	100.00
V2S	shadowed_reset_glitch	keymgr_dpe_shadow_reg_errors	2.670s	124.807us	1	1	100.00
V2S	shadow_reg_update_error_with_csr_rw	keymgr_dpe_shadow_reg_errors_with_csr_rw	3.180s	504.682us	1	1	100.00
V2S	prim_count_check	keymgr_dpe_sec_cm	14.650s	2.583ms	1	1	100.00
V2S	prim_fsm_check	keymgr_dpe_sec_cm	14.650s	2.583ms	1	1	100.00
V2S		TOTAL			4	4	100.00
		TOTAL			14	14	100.00