63d024d| Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
|---|---|---|---|---|---|---|---|
| V1 | mbx_smoke | mbx_smoke | 49.000s | 31.105ms | 1 | 1 | 100.00 |
| V1 | csr_hw_reset | mbx_csr_hw_reset | 4.000s | 48.905us | 1 | 1 | 100.00 |
| V1 | csr_rw | mbx_csr_rw | 4.000s | 19.584us | 1 | 1 | 100.00 |
| V1 | csr_bit_bash | mbx_csr_bit_bash | 5.000s | 682.904us | 1 | 1 | 100.00 |
| V1 | csr_aliasing | mbx_csr_aliasing | 4.000s | 13.152us | 1 | 1 | 100.00 |
| V1 | csr_mem_rw_with_rand_reset | mbx_csr_mem_rw_with_rand_reset | 4.000s | 7.289us | 0 | 1 | 0.00 |
| V1 | regwen_csr_and_corresponding_lockable_csr | mbx_csr_rw | 4.000s | 19.584us | 1 | 1 | 100.00 |
| mbx_csr_aliasing | 4.000s | 13.152us | 1 | 1 | 100.00 | ||
| V1 | TOTAL | 5 | 6 | 83.33 | |||
| V2 | mbx_stress | mbx_stress | 11.000s | 902.378us | 0 | 1 | 0.00 |
| mbx_stress_zero_delays | 15.000s | 248.788us | 1 | 1 | 100.00 | ||
| V2 | mbx_imbx_oob | mbx_imbx_oob | 22.000s | 14.006ms | 1 | 1 | 100.00 |
| V2 | alert_test | mbx_alert_test | 4.000s | 18.399us | 1 | 1 | 100.00 |
| V2 | tl_d_oob_addr_access | mbx_tl_errors | 3.000s | 1.075us | 0 | 1 | 0.00 |
| V2 | tl_d_illegal_access | mbx_tl_errors | 3.000s | 1.075us | 0 | 1 | 0.00 |
| V2 | tl_d_outstanding_access | mbx_csr_hw_reset | 4.000s | 48.905us | 1 | 1 | 100.00 |
| mbx_csr_rw | 4.000s | 19.584us | 1 | 1 | 100.00 | ||
| mbx_csr_aliasing | 4.000s | 13.152us | 1 | 1 | 100.00 | ||
| mbx_same_csr_outstanding | 4.000s | 23.567us | 1 | 1 | 100.00 | ||
| V2 | tl_d_partial_access | mbx_csr_hw_reset | 4.000s | 48.905us | 1 | 1 | 100.00 |
| mbx_csr_rw | 4.000s | 19.584us | 1 | 1 | 100.00 | ||
| mbx_csr_aliasing | 4.000s | 13.152us | 1 | 1 | 100.00 | ||
| mbx_same_csr_outstanding | 4.000s | 23.567us | 1 | 1 | 100.00 | ||
| V2 | TOTAL | 4 | 6 | 66.67 | |||
| V2S | tl_intg_err | mbx_sec_cm | 3.000s | 35.830us | 1 | 1 | 100.00 |
| mbx_tl_intg_err | 4.000s | 21.764us | 0 | 1 | 0.00 | ||
| V2S | TOTAL | 1 | 2 | 50.00 | |||
| TOTAL | 10 | 14 | 71.43 |
UVM_ERROR (tl_host_seq.sv:55) sequencer [tl_seq] fail to find matching req for rsp[*]: a_addr = * a_data = * a_mask = * a_size = * a_param = * a_source = * a_opcode = PutFullData a_user = * d_data = * d_size = * d_param = * d_source = * d_opcode = AccessAck d_error = * d_user = * d_sink = * req_abort_after_a_valid_len = * rsp_abort_after_d_valid_len = * req_completed = * rsp_completed = * has 2 failures:
Test mbx_tl_errors has 1 failures.
0.mbx_tl_errors.40429058237566424122688026420904933542885865506624779731311531589798684168149
Line 82, in log /nightly/runs/scratch/master/mbx-sim-xcelium/0.mbx_tl_errors/latest/run.log
UVM_ERROR @ 1074969 ps: (tl_host_seq.sv:55) uvm_test_top.env.m_tl_agent_mbx_mem_reg_block.sequencer [uvm_test_top.env.virtual_sequencer._item.tl_seq] fail to find matching req for rsp[0]: a_addr = 0x20b091e8 a_data = 0x9b1496c3 a_mask = 0xf a_size = 0x2 a_param = 0x0 a_source = 0x71 a_opcode = PutFullData a_user = 0x1bb80 d_data = 0xdb8704cc d_size = 0x0 d_param = 0x0 d_source = 0x12 d_opcode = AccessAck d_error = 0 d_user = 110011010100 d_sink = 0 req_abort_after_a_valid_len = 0 rsp_abort_after_d_valid_len = 0 req_completed = 0 rsp_completed = 1
UVM_INFO @ 1074969 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Test mbx_csr_mem_rw_with_rand_reset has 1 failures.
0.mbx_csr_mem_rw_with_rand_reset.111071227326902554011521073843664378390440187374810964322469369400050584317607
Line 83, in log /nightly/runs/scratch/master/mbx-sim-xcelium/0.mbx_csr_mem_rw_with_rand_reset/latest/run.log
UVM_ERROR @ 7288844 ps: (tl_host_seq.sv:55) uvm_test_top.env.m_tl_agent_mbx_mem_reg_block.sequencer [uvm_test_top.env.virtual_sequencer._item.tl_seq] fail to find matching req for rsp[0]: a_addr = 0x3513a088 a_data = 0x7e046e7e a_mask = 0xf a_size = 0x2 a_param = 0x0 a_source = 0x8f a_opcode = PutFullData a_user = 0x3aea9 d_data = 0xd3c333e4 d_size = 0x0 d_param = 0x0 d_source = 0xf8 d_opcode = AccessAck d_error = 0 d_user = 11100000111111 d_sink = 1 req_abort_after_a_valid_len = 0 rsp_abort_after_d_valid_len = 0 req_completed = 0 rsp_completed = 1
UVM_INFO @ 7288844 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
xmsim: *E,ASRTST (/nightly/runs/scratch/master/mbx-sim-xcelium/default/src/lowrisc_ip_mbx_*/rtl/mbx_ombx.sv,286): Assertion ReadyAssertedWhenRead_A has failed has 1 failures:
0.mbx_stress.110309467186623576880320604597807010279755346131114859042499662446718747777958
Line 123, in log /nightly/runs/scratch/master/mbx-sim-xcelium/0.mbx_stress/latest/run.log
xmsim: *E,ASRTST (/nightly/runs/scratch/master/mbx-sim-xcelium/default/src/lowrisc_ip_mbx_0.1/rtl/mbx_ombx.sv,286): (time 902377600 PS) Assertion tb.dut.u_ombx.ReadyAssertedWhenRead_A has failed
UVM_ERROR @ 902377600 ps: (mbx_ombx.sv:286) [ASSERT FAILED] ReadyAssertedWhenRead_A
UVM_INFO @ 902377600 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_ERROR (tl_host_seq.sv:55) sequencer [tl_seq] fail to find matching req for rsp[*]: a_addr = * a_data = * a_mask = * a_size = * a_param = * a_source = * a_opcode = Get a_user = * d_data = * d_size = * d_param = * d_source = * d_opcode = AccessAck d_error = * d_user = * d_sink = * req_abort_after_a_valid_len = * rsp_abort_after_d_valid_len = * req_completed = * rsp_completed = * has 1 failures:
0.mbx_tl_intg_err.50739455115366985522053972894430750440516676809741062909249285511826250206422
Line 95, in log /nightly/runs/scratch/master/mbx-sim-xcelium/0.mbx_tl_intg_err/latest/run.log
UVM_ERROR @ 21764098 ps: (tl_host_seq.sv:55) uvm_test_top.env.m_tl_agent_mbx_mem_reg_block.sequencer [uvm_test_top.env.virtual_sequencer._item.tl_seq] fail to find matching req for rsp[0]: a_addr = 0xc4bd513a a_data = 0xbea8b35f a_mask = 0x8 a_size = 0x1 a_param = 0x0 a_source = 0x94 a_opcode = Get a_user = 0x25a5c d_data = 0x664ae4d5 d_size = 0x3 d_param = 0x0 d_source = 0x54 d_opcode = AccessAck d_error = 0 d_user = 100110100110 d_sink = 0 req_abort_after_a_valid_len = 0 rsp_abort_after_d_valid_len = 0 req_completed = 0 rsp_completed = 1
UVM_INFO @ 21764098 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---