KMAC/MASKED Simulation Results

Thursday May 15 2025 17:06:21 UTC

GitHub Revision: 38b1fbc

Branch: master

Testplan

Simulator: VCS

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke kmac_smoke 5.470s 435.929us 1 1 100.00
V1 csr_hw_reset kmac_csr_hw_reset 2.000s 54.257us 1 1 100.00
V1 csr_rw kmac_csr_rw 1.810s 63.583us 1 1 100.00
V1 csr_bit_bash kmac_csr_bit_bash 15.130s 5.203ms 1 1 100.00
V1 csr_aliasing kmac_csr_aliasing 5.370s 1.053ms 1 1 100.00
V1 csr_mem_rw_with_rand_reset kmac_csr_mem_rw_with_rand_reset 2.320s 39.513us 1 1 100.00
V1 regwen_csr_and_corresponding_lockable_csr kmac_csr_rw 1.810s 63.583us 1 1 100.00
kmac_csr_aliasing 5.370s 1.053ms 1 1 100.00
V1 mem_walk kmac_mem_walk 1.730s 12.144us 1 1 100.00
V1 mem_partial_access kmac_mem_partial_access 1.990s 29.794us 1 1 100.00
V1 TOTAL 8 8 100.00
V2 long_msg_and_output kmac_long_msg_and_output 39.680s 1.042ms 1 1 100.00
V2 burst_write kmac_burst_write 15.980m 95.880ms 1 1 100.00
V2 test_vectors kmac_test_vectors_sha3_224 30.229m 125.583ms 1 1 100.00
kmac_test_vectors_sha3_256 32.740s 5.102ms 1 1 100.00
kmac_test_vectors_sha3_384 25.120s 1.932ms 1 1 100.00
kmac_test_vectors_sha3_512 17.380s 3.459ms 1 1 100.00
kmac_test_vectors_shake_128 33.835m 368.897ms 1 1 100.00
kmac_test_vectors_shake_256 23.974m 17.427ms 1 1 100.00
kmac_test_vectors_kmac 3.810s 147.152us 1 1 100.00
kmac_test_vectors_kmac_xof 4.800s 301.742us 1 1 100.00
V2 sideload kmac_sideload 1.537m 4.291ms 1 1 100.00
V2 app kmac_app 1.716m 5.322ms 1 1 100.00
V2 app_with_partial_data kmac_app_with_partial_data 23.930s 11.904ms 1 1 100.00
V2 entropy_refresh kmac_entropy_refresh 2.466m 40.734ms 1 1 100.00
V2 error kmac_error 3.344m 32.211ms 1 1 100.00
V2 key_error kmac_key_error 5.590s 3.160ms 1 1 100.00
V2 sideload_invalid kmac_sideload_invalid 5.140s 161.337us 1 1 100.00
V2 edn_timeout_error kmac_edn_timeout_error 1.860s 22.004us 1 1 100.00
V2 entropy_mode_error kmac_entropy_mode_error 12.790s 1.026ms 1 1 100.00
V2 entropy_ready_error kmac_entropy_ready_error 57.300s 23.825ms 1 1 100.00
V2 lc_escalation kmac_lc_escalation 2.250s 78.131us 1 1 100.00
V2 stress_all kmac_stress_all 5.625m 20.367ms 1 1 100.00
V2 intr_test kmac_intr_test 1.680s 16.594us 1 1 100.00
V2 alert_test kmac_alert_test 1.770s 25.787us 1 1 100.00
V2 tl_d_oob_addr_access kmac_tl_errors 3.750s 294.976us 1 1 100.00
V2 tl_d_illegal_access kmac_tl_errors 3.750s 294.976us 1 1 100.00
V2 tl_d_outstanding_access kmac_csr_hw_reset 2.000s 54.257us 1 1 100.00
kmac_csr_rw 1.810s 63.583us 1 1 100.00
kmac_csr_aliasing 5.370s 1.053ms 1 1 100.00
kmac_same_csr_outstanding 2.570s 70.447us 1 1 100.00
V2 tl_d_partial_access kmac_csr_hw_reset 2.000s 54.257us 1 1 100.00
kmac_csr_rw 1.810s 63.583us 1 1 100.00
kmac_csr_aliasing 5.370s 1.053ms 1 1 100.00
kmac_same_csr_outstanding 2.570s 70.447us 1 1 100.00
V2 TOTAL 26 26 100.00
V2S shadow_reg_update_error kmac_shadow_reg_errors 2.340s 49.489us 1 1 100.00
V2S shadow_reg_read_clear_staged_value kmac_shadow_reg_errors 2.340s 49.489us 1 1 100.00
V2S shadow_reg_storage_error kmac_shadow_reg_errors 2.340s 49.489us 1 1 100.00
V2S shadowed_reset_glitch kmac_shadow_reg_errors 2.340s 49.489us 1 1 100.00
V2S shadow_reg_update_error_with_csr_rw kmac_shadow_reg_errors_with_csr_rw 2.900s 218.806us 1 1 100.00
V2S tl_intg_err kmac_sec_cm 30.110s 9.610ms 1 1 100.00
kmac_tl_intg_err 4.150s 447.246us 1 1 100.00
V2S sec_cm_bus_integrity kmac_tl_intg_err 4.150s 447.246us 1 1 100.00
V2S sec_cm_lc_escalate_en_intersig_mubi kmac_lc_escalation 2.250s 78.131us 1 1 100.00
V2S sec_cm_sw_key_key_masking kmac_smoke 5.470s 435.929us 1 1 100.00
V2S sec_cm_key_sideload kmac_sideload 1.537m 4.291ms 1 1 100.00
V2S sec_cm_cfg_shadowed_config_shadow kmac_shadow_reg_errors 2.340s 49.489us 1 1 100.00
V2S sec_cm_fsm_sparse kmac_sec_cm 30.110s 9.610ms 1 1 100.00
V2S sec_cm_ctr_redun kmac_sec_cm 30.110s 9.610ms 1 1 100.00
V2S sec_cm_packer_ctr_redun kmac_sec_cm 30.110s 9.610ms 1 1 100.00
V2S sec_cm_cfg_shadowed_config_regwen kmac_smoke 5.470s 435.929us 1 1 100.00
V2S sec_cm_fsm_global_esc kmac_lc_escalation 2.250s 78.131us 1 1 100.00
V2S sec_cm_fsm_local_esc kmac_sec_cm 30.110s 9.610ms 1 1 100.00
V2S sec_cm_absorbed_ctrl_mubi kmac_mubi 54.460s 3.783ms 1 1 100.00
V2S sec_cm_sw_cmd_ctrl_sparse kmac_smoke 5.470s 435.929us 1 1 100.00
V2S TOTAL 5 5 100.00
V3 stress_all_with_rand_reset kmac_stress_all_with_rand_reset 1.076m 9.869ms 1 1 100.00
V3 TOTAL 1 1 100.00
TOTAL 40 40 100.00