KEYMGR_DPE Simulation Results

Monday May 19 2025 17:04:48 UTC

GitHub Revision: b21d4d7

Branch: master

Testplan

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	keymgr_dpe_smoke	15.360s	1.275ms	1	1	100.00
V1	csr_hw_reset	keymgr_dpe_csr_hw_reset	1.660s	23.682us	1	1	100.00
V1	csr_rw	keymgr_dpe_csr_rw	1.740s	35.576us	1	1	100.00
V1	csr_bit_bash	keymgr_dpe_csr_bit_bash	6.930s	177.085us	1	1	100.00
V1	csr_aliasing	keymgr_dpe_csr_aliasing	4.280s	856.943us	1	1	100.00
V1	csr_mem_rw_with_rand_reset	keymgr_dpe_csr_mem_rw_with_rand_reset	2.570s	169.463us	1	1	100.00
V1	regwen_csr_and_corresponding_lockable_csr	keymgr_dpe_csr_rw	1.740s	35.576us	1	1	100.00
		keymgr_dpe_csr_aliasing	4.280s	856.943us	1	1	100.00
V1		TOTAL			6	6	100.00
V2	intr_test	keymgr_dpe_intr_test	1.520s	39.476us	1	1	100.00
V2	alert_test	keymgr_dpe_alert_test	2.150s	14.861us	1	1	100.00
V2	tl_d_oob_addr_access	keymgr_dpe_tl_errors	2.360s	21.593us	1	1	100.00
V2	tl_d_illegal_access	keymgr_dpe_tl_errors	2.360s	21.593us	1	1	100.00
V2	tl_d_outstanding_access	keymgr_dpe_csr_hw_reset	1.660s	23.682us	1	1	100.00
		keymgr_dpe_csr_rw	1.740s	35.576us	1	1	100.00
		keymgr_dpe_csr_aliasing	4.280s	856.943us	1	1	100.00
		keymgr_dpe_same_csr_outstanding	3.350s	1.032ms	1	1	100.00
V2	tl_d_partial_access	keymgr_dpe_csr_hw_reset	1.660s	23.682us	1	1	100.00
		keymgr_dpe_csr_rw	1.740s	35.576us	1	1	100.00
		keymgr_dpe_csr_aliasing	4.280s	856.943us	1	1	100.00
		keymgr_dpe_same_csr_outstanding	3.350s	1.032ms	1	1	100.00
V2		TOTAL			4	4	100.00
V2S	tl_intg_err	keymgr_dpe_sec_cm	11.120s	322.235us	1	1	100.00
		keymgr_dpe_tl_intg_err	5.000s	291.320us	1	1	100.00
V2S	shadow_reg_update_error	keymgr_dpe_shadow_reg_errors	2.370s	36.198us	1	1	100.00
V2S	shadow_reg_read_clear_staged_value	keymgr_dpe_shadow_reg_errors	2.370s	36.198us	1	1	100.00
V2S	shadow_reg_storage_error	keymgr_dpe_shadow_reg_errors	2.370s	36.198us	1	1	100.00
V2S	shadowed_reset_glitch	keymgr_dpe_shadow_reg_errors	2.370s	36.198us	1	1	100.00
V2S	shadow_reg_update_error_with_csr_rw	keymgr_dpe_shadow_reg_errors_with_csr_rw	3.490s	574.833us	1	1	100.00
V2S	prim_count_check	keymgr_dpe_sec_cm	11.120s	322.235us	1	1	100.00
V2S	prim_fsm_check	keymgr_dpe_sec_cm	11.120s	322.235us	1	1	100.00
V2S		TOTAL			4	4	100.00
		TOTAL			14	14	100.00