| V1 |
smoke |
keymgr_dpe_smoke |
18.340s |
1.628ms |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
keymgr_dpe_csr_hw_reset |
1.620s |
69.349us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
keymgr_dpe_csr_rw |
1.660s |
86.164us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
keymgr_dpe_csr_bit_bash |
6.290s |
171.587us |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
keymgr_dpe_csr_aliasing |
7.550s |
835.652us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
keymgr_dpe_csr_mem_rw_with_rand_reset |
1.910s |
125.351us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
keymgr_dpe_csr_rw |
1.660s |
86.164us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_csr_aliasing |
7.550s |
835.652us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
6 |
6 |
100.00 |
| V2 |
intr_test |
keymgr_dpe_intr_test |
1.530s |
22.459us |
1 |
1 |
100.00 |
| V2 |
alert_test |
keymgr_dpe_alert_test |
1.890s |
71.741us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
keymgr_dpe_tl_errors |
4.150s |
532.325us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
keymgr_dpe_tl_errors |
4.150s |
532.325us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
keymgr_dpe_csr_hw_reset |
1.620s |
69.349us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_csr_rw |
1.660s |
86.164us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_csr_aliasing |
7.550s |
835.652us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_same_csr_outstanding |
1.940s |
219.488us |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
keymgr_dpe_csr_hw_reset |
1.620s |
69.349us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_csr_rw |
1.660s |
86.164us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_csr_aliasing |
7.550s |
835.652us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_same_csr_outstanding |
1.940s |
219.488us |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
4 |
4 |
100.00 |
| V2S |
tl_intg_err |
keymgr_dpe_sec_cm |
6.460s |
366.369us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_tl_intg_err |
3.610s |
331.099us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_update_error |
keymgr_dpe_shadow_reg_errors |
2.230s |
86.506us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_read_clear_staged_value |
keymgr_dpe_shadow_reg_errors |
2.230s |
86.506us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_storage_error |
keymgr_dpe_shadow_reg_errors |
2.230s |
86.506us |
1 |
1 |
100.00 |
| V2S |
shadowed_reset_glitch |
keymgr_dpe_shadow_reg_errors |
2.230s |
86.506us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_update_error_with_csr_rw |
keymgr_dpe_shadow_reg_errors_with_csr_rw |
3.470s |
63.629us |
1 |
1 |
100.00 |
| V2S |
prim_count_check |
keymgr_dpe_sec_cm |
6.460s |
366.369us |
1 |
1 |
100.00 |
| V2S |
prim_fsm_check |
keymgr_dpe_sec_cm |
6.460s |
366.369us |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
4 |
4 |
100.00 |
|
|
TOTAL |
|
|
14 |
14 |
100.00 |