| V1 |
smoke |
kmac_smoke |
20.920s |
595.479us |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
kmac_csr_hw_reset |
1.980s |
387.930us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
kmac_csr_rw |
1.930s |
33.666us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
kmac_csr_bit_bash |
13.990s |
3.446ms |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
kmac_csr_aliasing |
4.190s |
200.692us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
kmac_csr_mem_rw_with_rand_reset |
2.570s |
102.428us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
kmac_csr_rw |
1.930s |
33.666us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
4.190s |
200.692us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
kmac_mem_walk |
2.150s |
27.316us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
kmac_mem_partial_access |
2.390s |
20.400us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
long_msg_and_output |
kmac_long_msg_and_output |
25.051m |
48.273ms |
1 |
1 |
100.00 |
| V2 |
burst_write |
kmac_burst_write |
58.450s |
5.400ms |
1 |
1 |
100.00 |
| V2 |
test_vectors |
kmac_test_vectors_sha3_224 |
34.080s |
10.316ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_256 |
27.950s |
1.663ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_384 |
17.962m |
333.941ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_512 |
8.580m |
19.044ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_shake_128 |
22.064m |
80.336ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_shake_256 |
1.157m |
6.421ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_kmac |
3.090s |
58.238us |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_kmac_xof |
2.930s |
103.932us |
1 |
1 |
100.00 |
| V2 |
sideload |
kmac_sideload |
2.042m |
4.712ms |
1 |
1 |
100.00 |
| V2 |
app |
kmac_app |
16.570s |
2.011ms |
1 |
1 |
100.00 |
| V2 |
app_with_partial_data |
kmac_app_with_partial_data |
3.598m |
42.101ms |
1 |
1 |
100.00 |
| V2 |
entropy_refresh |
kmac_entropy_refresh |
54.140s |
3.632ms |
1 |
1 |
100.00 |
| V2 |
error |
kmac_error |
2.743m |
33.600ms |
1 |
1 |
100.00 |
| V2 |
key_error |
kmac_key_error |
8.250s |
4.782ms |
1 |
1 |
100.00 |
| V2 |
sideload_invalid |
kmac_sideload_invalid |
3.590s |
604.020us |
1 |
1 |
100.00 |
| V2 |
edn_timeout_error |
kmac_edn_timeout_error |
19.870s |
1.423ms |
1 |
1 |
100.00 |
| V2 |
entropy_mode_error |
kmac_entropy_mode_error |
4.670s |
193.561us |
1 |
1 |
100.00 |
| V2 |
entropy_ready_error |
kmac_entropy_ready_error |
13.060s |
4.809ms |
1 |
1 |
100.00 |
| V2 |
lc_escalation |
kmac_lc_escalation |
2.610s |
37.160us |
1 |
1 |
100.00 |
| V2 |
stress_all |
kmac_stress_all |
6.403m |
43.452ms |
1 |
1 |
100.00 |
| V2 |
intr_test |
kmac_intr_test |
1.720s |
14.398us |
1 |
1 |
100.00 |
| V2 |
alert_test |
kmac_alert_test |
1.740s |
18.345us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
kmac_tl_errors |
2.710s |
345.068us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
kmac_tl_errors |
2.710s |
345.068us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
kmac_csr_hw_reset |
1.980s |
387.930us |
1 |
1 |
100.00 |
|
|
kmac_csr_rw |
1.930s |
33.666us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
4.190s |
200.692us |
1 |
1 |
100.00 |
|
|
kmac_same_csr_outstanding |
2.380s |
39.241us |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
kmac_csr_hw_reset |
1.980s |
387.930us |
1 |
1 |
100.00 |
|
|
kmac_csr_rw |
1.930s |
33.666us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
4.190s |
200.692us |
1 |
1 |
100.00 |
|
|
kmac_same_csr_outstanding |
2.380s |
39.241us |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
26 |
26 |
100.00 |
| V2S |
shadow_reg_update_error |
kmac_shadow_reg_errors |
2.260s |
60.443us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_read_clear_staged_value |
kmac_shadow_reg_errors |
2.260s |
60.443us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_storage_error |
kmac_shadow_reg_errors |
2.260s |
60.443us |
1 |
1 |
100.00 |
| V2S |
shadowed_reset_glitch |
kmac_shadow_reg_errors |
2.260s |
60.443us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_update_error_with_csr_rw |
kmac_shadow_reg_errors_with_csr_rw |
4.150s |
348.833us |
1 |
1 |
100.00 |
| V2S |
tl_intg_err |
kmac_sec_cm |
37.740s |
3.654ms |
1 |
1 |
100.00 |
|
|
kmac_tl_intg_err |
5.400s |
191.365us |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
kmac_tl_intg_err |
5.400s |
191.365us |
1 |
1 |
100.00 |
| V2S |
sec_cm_lc_escalate_en_intersig_mubi |
kmac_lc_escalation |
2.610s |
37.160us |
1 |
1 |
100.00 |
| V2S |
sec_cm_sw_key_key_masking |
kmac_smoke |
20.920s |
595.479us |
1 |
1 |
100.00 |
| V2S |
sec_cm_key_sideload |
kmac_sideload |
2.042m |
4.712ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_cfg_shadowed_config_shadow |
kmac_shadow_reg_errors |
2.260s |
60.443us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_sparse |
kmac_sec_cm |
37.740s |
3.654ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_ctr_redun |
kmac_sec_cm |
37.740s |
3.654ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_packer_ctr_redun |
kmac_sec_cm |
37.740s |
3.654ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_cfg_shadowed_config_regwen |
kmac_smoke |
20.920s |
595.479us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_global_esc |
kmac_lc_escalation |
2.610s |
37.160us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_local_esc |
kmac_sec_cm |
37.740s |
3.654ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_absorbed_ctrl_mubi |
kmac_mubi |
4.580s |
931.291us |
1 |
1 |
100.00 |
| V2S |
sec_cm_sw_cmd_ctrl_sparse |
kmac_smoke |
20.920s |
595.479us |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
5 |
5 |
100.00 |
| V3 |
stress_all_with_rand_reset |
kmac_stress_all_with_rand_reset |
2.096m |
11.029ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
1 |
1 |
100.00 |
|
|
TOTAL |
|
|
40 |
40 |
100.00 |