| V1 |
smoke |
keymgr_dpe_smoke |
15.290s |
3.318ms |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
keymgr_dpe_csr_hw_reset |
2.080s |
29.049us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
keymgr_dpe_csr_rw |
1.860s |
53.854us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
keymgr_dpe_csr_bit_bash |
8.330s |
384.252us |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
keymgr_dpe_csr_aliasing |
3.430s |
378.991us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
keymgr_dpe_csr_mem_rw_with_rand_reset |
2.470s |
617.217us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
keymgr_dpe_csr_rw |
1.860s |
53.854us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_csr_aliasing |
3.430s |
378.991us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
6 |
6 |
100.00 |
| V2 |
intr_test |
keymgr_dpe_intr_test |
1.510s |
18.491us |
1 |
1 |
100.00 |
| V2 |
alert_test |
keymgr_dpe_alert_test |
1.830s |
23.261us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
keymgr_dpe_tl_errors |
2.320s |
82.075us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
keymgr_dpe_tl_errors |
2.320s |
82.075us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
keymgr_dpe_csr_hw_reset |
2.080s |
29.049us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_csr_rw |
1.860s |
53.854us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_csr_aliasing |
3.430s |
378.991us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_same_csr_outstanding |
2.560s |
118.769us |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
keymgr_dpe_csr_hw_reset |
2.080s |
29.049us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_csr_rw |
1.860s |
53.854us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_csr_aliasing |
3.430s |
378.991us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_same_csr_outstanding |
2.560s |
118.769us |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
4 |
4 |
100.00 |
| V2S |
tl_intg_err |
keymgr_dpe_sec_cm |
16.690s |
1.124ms |
1 |
1 |
100.00 |
|
|
keymgr_dpe_tl_intg_err |
3.240s |
421.019us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_update_error |
keymgr_dpe_shadow_reg_errors |
2.230s |
113.291us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_read_clear_staged_value |
keymgr_dpe_shadow_reg_errors |
2.230s |
113.291us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_storage_error |
keymgr_dpe_shadow_reg_errors |
2.230s |
113.291us |
1 |
1 |
100.00 |
| V2S |
shadowed_reset_glitch |
keymgr_dpe_shadow_reg_errors |
2.230s |
113.291us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_update_error_with_csr_rw |
keymgr_dpe_shadow_reg_errors_with_csr_rw |
6.750s |
933.128us |
1 |
1 |
100.00 |
| V2S |
prim_count_check |
keymgr_dpe_sec_cm |
16.690s |
1.124ms |
1 |
1 |
100.00 |
| V2S |
prim_fsm_check |
keymgr_dpe_sec_cm |
16.690s |
1.124ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
4 |
4 |
100.00 |
|
|
TOTAL |
|
|
14 |
14 |
100.00 |