KEYMGR_DPE Simulation Results

Wednesday May 28 2025 17:00:46 UTC

GitHub Revision: 645424b

Branch: master

Testplan

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	keymgr_dpe_smoke	14.250s	752.658us	1	1	100.00
V1	csr_hw_reset	keymgr_dpe_csr_hw_reset	1.740s	59.380us	1	1	100.00
V1	csr_rw	keymgr_dpe_csr_rw	1.890s	49.481us	1	1	100.00
V1	csr_bit_bash	keymgr_dpe_csr_bit_bash	7.600s	336.057us	1	1	100.00
V1	csr_aliasing	keymgr_dpe_csr_aliasing	2.850s	130.742us	1	1	100.00
V1	csr_mem_rw_with_rand_reset	keymgr_dpe_csr_mem_rw_with_rand_reset	2.440s	84.203us	1	1	100.00
V1	regwen_csr_and_corresponding_lockable_csr	keymgr_dpe_csr_rw	1.890s	49.481us	1	1	100.00
		keymgr_dpe_csr_aliasing	2.850s	130.742us	1	1	100.00
V1		TOTAL			6	6	100.00
V2	intr_test	keymgr_dpe_intr_test	1.740s	18.620us	1	1	100.00
V2	alert_test	keymgr_dpe_alert_test	1.640s	11.148us	1	1	100.00
V2	tl_d_oob_addr_access	keymgr_dpe_tl_errors	2.530s	492.732us	1	1	100.00
V2	tl_d_illegal_access	keymgr_dpe_tl_errors	2.530s	492.732us	1	1	100.00
V2	tl_d_outstanding_access	keymgr_dpe_csr_hw_reset	1.740s	59.380us	1	1	100.00
		keymgr_dpe_csr_rw	1.890s	49.481us	1	1	100.00
		keymgr_dpe_csr_aliasing	2.850s	130.742us	1	1	100.00
		keymgr_dpe_same_csr_outstanding	2.280s	133.835us	1	1	100.00
V2	tl_d_partial_access	keymgr_dpe_csr_hw_reset	1.740s	59.380us	1	1	100.00
		keymgr_dpe_csr_rw	1.890s	49.481us	1	1	100.00
		keymgr_dpe_csr_aliasing	2.850s	130.742us	1	1	100.00
		keymgr_dpe_same_csr_outstanding	2.280s	133.835us	1	1	100.00
V2		TOTAL			4	4	100.00
V2S	tl_intg_err	keymgr_dpe_sec_cm	5.190s	1.789ms	1	1	100.00
		keymgr_dpe_tl_intg_err	3.520s	176.948us	1	1	100.00
V2S	shadow_reg_update_error	keymgr_dpe_shadow_reg_errors	2.460s	212.634us	1	1	100.00
V2S	shadow_reg_read_clear_staged_value	keymgr_dpe_shadow_reg_errors	2.460s	212.634us	1	1	100.00
V2S	shadow_reg_storage_error	keymgr_dpe_shadow_reg_errors	2.460s	212.634us	1	1	100.00
V2S	shadowed_reset_glitch	keymgr_dpe_shadow_reg_errors	2.460s	212.634us	1	1	100.00
V2S	shadow_reg_update_error_with_csr_rw	keymgr_dpe_shadow_reg_errors_with_csr_rw	3.150s	65.339us	1	1	100.00
V2S	prim_count_check	keymgr_dpe_sec_cm	5.190s	1.789ms	1	1	100.00
V2S	prim_fsm_check	keymgr_dpe_sec_cm	5.190s	1.789ms	1	1	100.00
V2S		TOTAL			4	4	100.00
		TOTAL			14	14	100.00