| V1 |
smoke |
keymgr_dpe_smoke |
23.140s |
5.219ms |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
keymgr_dpe_csr_hw_reset |
1.840s |
36.598us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
keymgr_dpe_csr_rw |
1.650s |
11.386us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
keymgr_dpe_csr_bit_bash |
4.090s |
966.956us |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
keymgr_dpe_csr_aliasing |
4.100s |
307.815us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
keymgr_dpe_csr_mem_rw_with_rand_reset |
2.270s |
56.782us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
keymgr_dpe_csr_rw |
1.650s |
11.386us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_csr_aliasing |
4.100s |
307.815us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
6 |
6 |
100.00 |
| V2 |
intr_test |
keymgr_dpe_intr_test |
1.450s |
13.057us |
1 |
1 |
100.00 |
| V2 |
alert_test |
keymgr_dpe_alert_test |
1.810s |
13.209us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
keymgr_dpe_tl_errors |
2.110s |
110.790us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
keymgr_dpe_tl_errors |
2.110s |
110.790us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
keymgr_dpe_csr_hw_reset |
1.840s |
36.598us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_csr_rw |
1.650s |
11.386us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_csr_aliasing |
4.100s |
307.815us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_same_csr_outstanding |
2.670s |
44.328us |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
keymgr_dpe_csr_hw_reset |
1.840s |
36.598us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_csr_rw |
1.650s |
11.386us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_csr_aliasing |
4.100s |
307.815us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_same_csr_outstanding |
2.670s |
44.328us |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
4 |
4 |
100.00 |
| V2S |
tl_intg_err |
keymgr_dpe_sec_cm |
6.000s |
491.528us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_tl_intg_err |
5.840s |
716.197us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_update_error |
keymgr_dpe_shadow_reg_errors |
2.680s |
268.870us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_read_clear_staged_value |
keymgr_dpe_shadow_reg_errors |
2.680s |
268.870us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_storage_error |
keymgr_dpe_shadow_reg_errors |
2.680s |
268.870us |
1 |
1 |
100.00 |
| V2S |
shadowed_reset_glitch |
keymgr_dpe_shadow_reg_errors |
2.680s |
268.870us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_update_error_with_csr_rw |
keymgr_dpe_shadow_reg_errors_with_csr_rw |
6.350s |
263.289us |
1 |
1 |
100.00 |
| V2S |
prim_count_check |
keymgr_dpe_sec_cm |
6.000s |
491.528us |
1 |
1 |
100.00 |
| V2S |
prim_fsm_check |
keymgr_dpe_sec_cm |
6.000s |
491.528us |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
4 |
4 |
100.00 |
|
|
TOTAL |
|
|
14 |
14 |
100.00 |