| V1 |
smoke |
aon_timer_smoke |
1.720s |
563.488us |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
aon_timer_csr_hw_reset |
1.500s |
851.284us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
aon_timer_csr_rw |
1.560s |
319.302us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
aon_timer_csr_bit_bash |
3.810s |
8.646ms |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
aon_timer_csr_aliasing |
1.780s |
382.688us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
aon_timer_csr_mem_rw_with_rand_reset |
2.020s |
326.742us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
aon_timer_csr_rw |
1.560s |
319.302us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.780s |
382.688us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
aon_timer_mem_walk |
1.570s |
343.519us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
aon_timer_mem_partial_access |
1.780s |
502.937us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
prescaler |
aon_timer_prescaler |
14.110s |
41.202ms |
1 |
1 |
100.00 |
| V2 |
jump |
aon_timer_jump |
1.920s |
755.102us |
1 |
1 |
100.00 |
| V2 |
stress_all |
aon_timer_stress_all |
3.880s |
2.718ms |
1 |
1 |
100.00 |
| V2 |
alert_test |
aon_timer_alert_test |
1.840s |
363.572us |
1 |
1 |
100.00 |
| V2 |
intr_test |
aon_timer_intr_test |
2.010s |
407.506us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
aon_timer_tl_errors |
2.740s |
575.662us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
aon_timer_tl_errors |
2.740s |
575.662us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
aon_timer_csr_hw_reset |
1.500s |
851.284us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
1.560s |
319.302us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.780s |
382.688us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
4.020s |
2.006ms |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
aon_timer_csr_hw_reset |
1.500s |
851.284us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
1.560s |
319.302us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.780s |
382.688us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
4.020s |
2.006ms |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
7 |
7 |
100.00 |
| V2S |
tl_intg_err |
aon_timer_sec_cm |
4.630s |
7.787ms |
1 |
1 |
100.00 |
|
|
aon_timer_tl_intg_err |
3.520s |
4.590ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
aon_timer_tl_intg_err |
3.520s |
4.590ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
2 |
2 |
100.00 |
| V3 |
max_threshold |
aon_timer_smoke_max_thold |
1.850s |
531.992us |
1 |
1 |
100.00 |
| V3 |
min_threshold |
aon_timer_smoke_min_thold |
1.860s |
477.325us |
1 |
1 |
100.00 |
| V3 |
wkup_count_hi_cdc |
aon_timer_wkup_count_cdc_hi |
4.760s |
3.817ms |
1 |
1 |
100.00 |
| V3 |
custom_intr |
aon_timer_custom_intr |
1.890s |
647.651us |
1 |
1 |
100.00 |
| V3 |
alternating_on_off |
aon_timer_alternating_enable_on_off |
6.730s |
4.169ms |
1 |
1 |
100.00 |
| V3 |
stress_all_with_rand_reset |
aon_timer_stress_all_with_rand_reset |
12.990s |
3.652ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
6 |
6 |
100.00 |
|
|
TOTAL |
|
|
23 |
23 |
100.00 |