| V1 |
smoke |
kmac_smoke |
50.700s |
3.432ms |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
kmac_csr_hw_reset |
1.790s |
24.095us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
kmac_csr_rw |
1.800s |
15.007us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
kmac_csr_bit_bash |
8.010s |
730.981us |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
kmac_csr_aliasing |
6.110s |
157.271us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
kmac_csr_mem_rw_with_rand_reset |
2.700s |
86.426us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
kmac_csr_rw |
1.800s |
15.007us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
6.110s |
157.271us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
kmac_mem_walk |
1.430s |
107.317us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
kmac_mem_partial_access |
1.700s |
66.218us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
long_msg_and_output |
kmac_long_msg_and_output |
37.304m |
179.814ms |
1 |
1 |
100.00 |
| V2 |
burst_write |
kmac_burst_write |
9.952m |
142.416ms |
1 |
1 |
100.00 |
| V2 |
test_vectors |
kmac_test_vectors_sha3_224 |
26.330s |
2.298ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_256 |
23.933m |
70.070ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_384 |
24.451m |
67.949ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_512 |
15.510s |
4.792ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_shake_128 |
2.977m |
27.518ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_shake_256 |
5.052m |
169.018ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_kmac |
2.730s |
174.824us |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_kmac_xof |
2.820s |
138.256us |
1 |
1 |
100.00 |
| V2 |
sideload |
kmac_sideload |
4.894m |
64.349ms |
1 |
1 |
100.00 |
| V2 |
app |
kmac_app |
2.824m |
9.309ms |
1 |
1 |
100.00 |
| V2 |
app_with_partial_data |
kmac_app_with_partial_data |
1.000m |
12.373ms |
1 |
1 |
100.00 |
| V2 |
entropy_refresh |
kmac_entropy_refresh |
2.881m |
4.545ms |
1 |
1 |
100.00 |
| V2 |
error |
kmac_error |
1.672m |
28.556ms |
1 |
1 |
100.00 |
| V2 |
key_error |
kmac_key_error |
7.360s |
8.196ms |
1 |
1 |
100.00 |
| V2 |
sideload_invalid |
kmac_sideload_invalid |
3.730s |
48.646us |
1 |
1 |
100.00 |
| V2 |
edn_timeout_error |
kmac_edn_timeout_error |
1.880s |
82.753us |
1 |
1 |
100.00 |
| V2 |
entropy_mode_error |
kmac_entropy_mode_error |
1.850s |
21.256us |
1 |
1 |
100.00 |
| V2 |
entropy_ready_error |
kmac_entropy_ready_error |
46.070s |
5.018ms |
1 |
1 |
100.00 |
| V2 |
lc_escalation |
kmac_lc_escalation |
1.810s |
61.462us |
1 |
1 |
100.00 |
| V2 |
stress_all |
kmac_stress_all |
7.086m |
60.984ms |
1 |
1 |
100.00 |
| V2 |
intr_test |
kmac_intr_test |
1.700s |
23.855us |
1 |
1 |
100.00 |
| V2 |
alert_test |
kmac_alert_test |
1.550s |
23.520us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
kmac_tl_errors |
2.470s |
320.091us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
kmac_tl_errors |
2.470s |
320.091us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
kmac_csr_hw_reset |
1.790s |
24.095us |
1 |
1 |
100.00 |
|
|
kmac_csr_rw |
1.800s |
15.007us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
6.110s |
157.271us |
1 |
1 |
100.00 |
|
|
kmac_same_csr_outstanding |
2.060s |
34.211us |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
kmac_csr_hw_reset |
1.790s |
24.095us |
1 |
1 |
100.00 |
|
|
kmac_csr_rw |
1.800s |
15.007us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
6.110s |
157.271us |
1 |
1 |
100.00 |
|
|
kmac_same_csr_outstanding |
2.060s |
34.211us |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
26 |
26 |
100.00 |
| V2S |
shadow_reg_update_error |
kmac_shadow_reg_errors |
2.700s |
214.984us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_read_clear_staged_value |
kmac_shadow_reg_errors |
2.700s |
214.984us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_storage_error |
kmac_shadow_reg_errors |
2.700s |
214.984us |
1 |
1 |
100.00 |
| V2S |
shadowed_reset_glitch |
kmac_shadow_reg_errors |
2.700s |
214.984us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_update_error_with_csr_rw |
kmac_shadow_reg_errors_with_csr_rw |
3.780s |
91.863us |
1 |
1 |
100.00 |
| V2S |
tl_intg_err |
kmac_sec_cm |
1.644m |
136.981ms |
1 |
1 |
100.00 |
|
|
kmac_tl_intg_err |
4.230s |
240.722us |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
kmac_tl_intg_err |
4.230s |
240.722us |
1 |
1 |
100.00 |
| V2S |
sec_cm_lc_escalate_en_intersig_mubi |
kmac_lc_escalation |
1.810s |
61.462us |
1 |
1 |
100.00 |
| V2S |
sec_cm_sw_key_key_masking |
kmac_smoke |
50.700s |
3.432ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_key_sideload |
kmac_sideload |
4.894m |
64.349ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_cfg_shadowed_config_shadow |
kmac_shadow_reg_errors |
2.700s |
214.984us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_sparse |
kmac_sec_cm |
1.644m |
136.981ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_ctr_redun |
kmac_sec_cm |
1.644m |
136.981ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_packer_ctr_redun |
kmac_sec_cm |
1.644m |
136.981ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_cfg_shadowed_config_regwen |
kmac_smoke |
50.700s |
3.432ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_global_esc |
kmac_lc_escalation |
1.810s |
61.462us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_local_esc |
kmac_sec_cm |
1.644m |
136.981ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_absorbed_ctrl_mubi |
kmac_mubi |
3.873m |
21.910ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_sw_cmd_ctrl_sparse |
kmac_smoke |
50.700s |
3.432ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
5 |
5 |
100.00 |
| V3 |
stress_all_with_rand_reset |
kmac_stress_all_with_rand_reset |
17.620s |
3.298ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
1 |
1 |
100.00 |
|
|
TOTAL |
|
|
40 |
40 |
100.00 |