RV_TIMER Simulation Results

Tuesday June 17 2025 17:02:32 UTC

GitHub Revision: b69339b

Branch: master

Testplan

Simulator: VCS

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 random rv_timer_random 1.630s 261.799us 1 1 100.00
V1 csr_hw_reset rv_timer_csr_hw_reset 1.580s 51.111us 1 1 100.00
V1 csr_rw rv_timer_csr_rw 1.740s 16.057us 1 1 100.00
V1 csr_bit_bash rv_timer_csr_bit_bash 2.050s 36.763us 1 1 100.00
V1 csr_aliasing rv_timer_csr_aliasing 1.630s 27.474us 1 1 100.00
V1 csr_mem_rw_with_rand_reset rv_timer_csr_mem_rw_with_rand_reset 1.650s 19.261us 1 1 100.00
V1 regwen_csr_and_corresponding_lockable_csr rv_timer_csr_rw 1.740s 16.057us 1 1 100.00
rv_timer_csr_aliasing 1.630s 27.474us 1 1 100.00
V1 TOTAL 6 6 100.00
V2 random_reset rv_timer_random_reset 1.690s 82.636us 1 1 100.00
V2 disabled rv_timer_disabled 2.680s 3.979ms 1 1 100.00
V2 cfg_update_on_fly rv_timer_cfg_update_on_fly 4.839m 741.204ms 1 1 100.00
V2 no_interrupt_test rv_timer_cfg_update_on_fly 4.839m 741.204ms 1 1 100.00
V2 stress rv_timer_stress_all 2.980s 5.413ms 1 1 100.00
V2 alert_test rv_timer_alert_test 1.620s 54.908us 1 1 100.00
V2 intr_test rv_timer_intr_test 1.330s 14.965us 1 1 100.00
V2 tl_d_oob_addr_access rv_timer_tl_errors 2.430s 94.986us 1 1 100.00
V2 tl_d_illegal_access rv_timer_tl_errors 2.430s 94.986us 1 1 100.00
V2 tl_d_outstanding_access rv_timer_csr_hw_reset 1.580s 51.111us 1 1 100.00
rv_timer_csr_rw 1.740s 16.057us 1 1 100.00
rv_timer_csr_aliasing 1.630s 27.474us 1 1 100.00
rv_timer_same_csr_outstanding 1.800s 18.677us 1 1 100.00
V2 tl_d_partial_access rv_timer_csr_hw_reset 1.580s 51.111us 1 1 100.00
rv_timer_csr_rw 1.740s 16.057us 1 1 100.00
rv_timer_csr_aliasing 1.630s 27.474us 1 1 100.00
rv_timer_same_csr_outstanding 1.800s 18.677us 1 1 100.00
V2 TOTAL 8 8 100.00
V2S tl_intg_err rv_timer_sec_cm 1.720s 170.351us 1 1 100.00
rv_timer_tl_intg_err 1.810s 394.298us 1 1 100.00
V2S sec_cm_bus_integrity rv_timer_tl_intg_err 1.810s 394.298us 1 1 100.00
V2S TOTAL 2 2 100.00
V3 min_value rv_timer_min 1.500s 22.089us 1 1 100.00
V3 max_value rv_timer_max 1.690s 13.210us 1 1 100.00
V3 stress_all_with_rand_reset rv_timer_stress_all_with_rand_reset 27.060s 5.312ms 1 1 100.00
V3 TOTAL 3 3 100.00
TOTAL 19 19 100.00