| V1 |
smoke |
aon_timer_smoke |
2.620s |
472.576us |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
aon_timer_csr_hw_reset |
1.660s |
1.244ms |
1 |
1 |
100.00 |
| V1 |
csr_rw |
aon_timer_csr_rw |
1.580s |
489.546us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
aon_timer_csr_bit_bash |
13.450s |
7.108ms |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
aon_timer_csr_aliasing |
1.770s |
447.675us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
aon_timer_csr_mem_rw_with_rand_reset |
2.200s |
318.490us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
aon_timer_csr_rw |
1.580s |
489.546us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.770s |
447.675us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
aon_timer_mem_walk |
2.340s |
444.031us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
aon_timer_mem_partial_access |
1.920s |
284.172us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
prescaler |
aon_timer_prescaler |
37.560s |
59.241ms |
1 |
1 |
100.00 |
| V2 |
jump |
aon_timer_jump |
2.210s |
670.531us |
1 |
1 |
100.00 |
| V2 |
stress_all |
aon_timer_stress_all |
1.718m |
95.390ms |
1 |
1 |
100.00 |
| V2 |
alert_test |
aon_timer_alert_test |
1.570s |
308.681us |
1 |
1 |
100.00 |
| V2 |
intr_test |
aon_timer_intr_test |
1.650s |
487.612us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
aon_timer_tl_errors |
3.350s |
576.649us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
aon_timer_tl_errors |
3.350s |
576.649us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
aon_timer_csr_hw_reset |
1.660s |
1.244ms |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
1.580s |
489.546us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.770s |
447.675us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
2.790s |
2.455ms |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
aon_timer_csr_hw_reset |
1.660s |
1.244ms |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
1.580s |
489.546us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.770s |
447.675us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
2.790s |
2.455ms |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
7 |
7 |
100.00 |
| V2S |
tl_intg_err |
aon_timer_sec_cm |
3.230s |
4.124ms |
1 |
1 |
100.00 |
|
|
aon_timer_tl_intg_err |
3.480s |
4.096ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
aon_timer_tl_intg_err |
3.480s |
4.096ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
2 |
2 |
100.00 |
| V3 |
max_threshold |
aon_timer_smoke_max_thold |
1.850s |
636.275us |
1 |
1 |
100.00 |
| V3 |
min_threshold |
aon_timer_smoke_min_thold |
2.390s |
527.389us |
1 |
1 |
100.00 |
| V3 |
wkup_count_hi_cdc |
aon_timer_wkup_count_cdc_hi |
4.750s |
4.029ms |
1 |
1 |
100.00 |
| V3 |
custom_intr |
aon_timer_custom_intr |
2.270s |
653.234us |
1 |
1 |
100.00 |
| V3 |
alternating_on_off |
aon_timer_alternating_enable_on_off |
3.490s |
4.207ms |
1 |
1 |
100.00 |
| V3 |
stress_all_with_rand_reset |
aon_timer_stress_all_with_rand_reset |
15.960s |
5.524ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
6 |
6 |
100.00 |
|
|
TOTAL |
|
|
23 |
23 |
100.00 |