| V1 |
smoke |
keymgr_dpe_smoke |
14.170s |
2.347ms |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
keymgr_dpe_csr_hw_reset |
2.040s |
107.267us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
keymgr_dpe_csr_rw |
1.840s |
64.315us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
keymgr_dpe_csr_bit_bash |
15.250s |
3.563ms |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
keymgr_dpe_csr_aliasing |
4.600s |
86.761us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
keymgr_dpe_csr_mem_rw_with_rand_reset |
1.880s |
36.784us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
keymgr_dpe_csr_rw |
1.840s |
64.315us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_csr_aliasing |
4.600s |
86.761us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
6 |
6 |
100.00 |
| V2 |
intr_test |
keymgr_dpe_intr_test |
1.680s |
17.615us |
1 |
1 |
100.00 |
| V2 |
alert_test |
keymgr_dpe_alert_test |
1.620s |
10.569us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
keymgr_dpe_tl_errors |
3.210s |
103.823us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
keymgr_dpe_tl_errors |
3.210s |
103.823us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
keymgr_dpe_csr_hw_reset |
2.040s |
107.267us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_csr_rw |
1.840s |
64.315us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_csr_aliasing |
4.600s |
86.761us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_same_csr_outstanding |
3.040s |
250.728us |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
keymgr_dpe_csr_hw_reset |
2.040s |
107.267us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_csr_rw |
1.840s |
64.315us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_csr_aliasing |
4.600s |
86.761us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_same_csr_outstanding |
3.040s |
250.728us |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
4 |
4 |
100.00 |
| V2S |
tl_intg_err |
keymgr_dpe_sec_cm |
9.320s |
1.959ms |
1 |
1 |
100.00 |
|
|
keymgr_dpe_tl_intg_err |
2.990s |
166.666us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_update_error |
keymgr_dpe_shadow_reg_errors |
2.060s |
381.575us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_read_clear_staged_value |
keymgr_dpe_shadow_reg_errors |
2.060s |
381.575us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_storage_error |
keymgr_dpe_shadow_reg_errors |
2.060s |
381.575us |
1 |
1 |
100.00 |
| V2S |
shadowed_reset_glitch |
keymgr_dpe_shadow_reg_errors |
2.060s |
381.575us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_update_error_with_csr_rw |
keymgr_dpe_shadow_reg_errors_with_csr_rw |
2.520s |
209.549us |
1 |
1 |
100.00 |
| V2S |
prim_count_check |
keymgr_dpe_sec_cm |
9.320s |
1.959ms |
1 |
1 |
100.00 |
| V2S |
prim_fsm_check |
keymgr_dpe_sec_cm |
9.320s |
1.959ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
4 |
4 |
100.00 |
|
|
TOTAL |
|
|
14 |
14 |
100.00 |