| V1 |
smoke |
aon_timer_smoke |
1.150s |
628.556us |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
aon_timer_csr_hw_reset |
1.110s |
1.133ms |
1 |
1 |
100.00 |
| V1 |
csr_rw |
aon_timer_csr_rw |
1.240s |
440.199us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
aon_timer_csr_bit_bash |
5.350s |
6.939ms |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
aon_timer_csr_aliasing |
1.080s |
689.923us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
aon_timer_csr_mem_rw_with_rand_reset |
0.990s |
383.721us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
aon_timer_csr_rw |
1.240s |
440.199us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.080s |
689.923us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
aon_timer_mem_walk |
1.450s |
322.477us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
aon_timer_mem_partial_access |
0.880s |
368.152us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
prescaler |
aon_timer_prescaler |
1.260s |
641.414us |
1 |
1 |
100.00 |
| V2 |
jump |
aon_timer_jump |
1.230s |
715.207us |
1 |
1 |
100.00 |
| V2 |
stress_all |
aon_timer_stress_all |
1.940s |
5.385ms |
1 |
1 |
100.00 |
| V2 |
alert_test |
aon_timer_alert_test |
1.360s |
450.564us |
1 |
1 |
100.00 |
| V2 |
intr_test |
aon_timer_intr_test |
0.720s |
528.638us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
aon_timer_tl_errors |
1.650s |
555.147us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
aon_timer_tl_errors |
1.650s |
555.147us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
aon_timer_csr_hw_reset |
1.110s |
1.133ms |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
1.240s |
440.199us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.080s |
689.923us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
2.040s |
1.602ms |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
aon_timer_csr_hw_reset |
1.110s |
1.133ms |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
1.240s |
440.199us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.080s |
689.923us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
2.040s |
1.602ms |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
7 |
7 |
100.00 |
| V2S |
tl_intg_err |
aon_timer_sec_cm |
2.490s |
4.194ms |
1 |
1 |
100.00 |
|
|
aon_timer_tl_intg_err |
2.550s |
4.570ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
aon_timer_tl_intg_err |
2.550s |
4.570ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
2 |
2 |
100.00 |
| V3 |
max_threshold |
aon_timer_smoke_max_thold |
1.020s |
673.668us |
1 |
1 |
100.00 |
| V3 |
min_threshold |
aon_timer_smoke_min_thold |
1.480s |
712.595us |
1 |
1 |
100.00 |
| V3 |
wkup_count_hi_cdc |
aon_timer_wkup_count_cdc_hi |
4.090s |
3.870ms |
1 |
1 |
100.00 |
| V3 |
custom_intr |
aon_timer_custom_intr |
1.050s |
552.698us |
1 |
1 |
100.00 |
| V3 |
alternating_on_off |
aon_timer_alternating_enable_on_off |
11.990s |
4.100ms |
1 |
1 |
100.00 |
| V3 |
stress_all_with_rand_reset |
aon_timer_stress_all_with_rand_reset |
7.160s |
1.213ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
6 |
6 |
100.00 |
|
|
TOTAL |
|
|
23 |
23 |
100.00 |