| V1 |
smoke |
aon_timer_smoke |
1.360s |
650.081us |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
aon_timer_csr_hw_reset |
0.820s |
1.111ms |
1 |
1 |
100.00 |
| V1 |
csr_rw |
aon_timer_csr_rw |
0.900s |
364.010us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
aon_timer_csr_bit_bash |
1.690s |
7.250ms |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
aon_timer_csr_aliasing |
0.870s |
346.863us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
aon_timer_csr_mem_rw_with_rand_reset |
0.920s |
379.107us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
aon_timer_csr_rw |
0.900s |
364.010us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
0.870s |
346.863us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
aon_timer_mem_walk |
0.600s |
409.508us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
aon_timer_mem_partial_access |
0.610s |
570.492us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
prescaler |
aon_timer_prescaler |
25.170s |
21.872ms |
1 |
1 |
100.00 |
| V2 |
jump |
aon_timer_jump |
0.880s |
556.865us |
1 |
1 |
100.00 |
| V2 |
stress_all |
aon_timer_stress_all |
23.770s |
37.583ms |
1 |
1 |
100.00 |
| V2 |
alert_test |
aon_timer_alert_test |
1.250s |
516.268us |
1 |
1 |
100.00 |
| V2 |
intr_test |
aon_timer_intr_test |
0.920s |
276.184us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
aon_timer_tl_errors |
1.240s |
470.764us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
aon_timer_tl_errors |
1.240s |
470.764us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
aon_timer_csr_hw_reset |
0.820s |
1.111ms |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
0.900s |
364.010us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
0.870s |
346.863us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
1.780s |
1.196ms |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
aon_timer_csr_hw_reset |
0.820s |
1.111ms |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
0.900s |
364.010us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
0.870s |
346.863us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
1.780s |
1.196ms |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
7 |
7 |
100.00 |
| V2S |
tl_intg_err |
aon_timer_sec_cm |
3.290s |
8.002ms |
1 |
1 |
100.00 |
|
|
aon_timer_tl_intg_err |
5.540s |
4.138ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
aon_timer_tl_intg_err |
5.540s |
4.138ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
2 |
2 |
100.00 |
| V3 |
max_threshold |
aon_timer_smoke_max_thold |
1.370s |
660.198us |
1 |
1 |
100.00 |
| V3 |
min_threshold |
aon_timer_smoke_min_thold |
1.250s |
525.492us |
1 |
1 |
100.00 |
| V3 |
wkup_count_hi_cdc |
aon_timer_wkup_count_cdc_hi |
2.620s |
3.552ms |
1 |
1 |
100.00 |
| V3 |
custom_intr |
aon_timer_custom_intr |
1.320s |
658.107us |
1 |
1 |
100.00 |
| V3 |
alternating_on_off |
aon_timer_alternating_enable_on_off |
4.010s |
4.143ms |
1 |
1 |
100.00 |
| V3 |
stress_all_with_rand_reset |
aon_timer_stress_all_with_rand_reset |
8.170s |
2.408ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
6 |
6 |
100.00 |
|
|
TOTAL |
|
|
23 |
23 |
100.00 |