RV_TIMER Simulation Results

Thursday September 04 2025 16:03:40 UTC

GitHub Revision: 72c264a

Branch: master

Testplan

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	random	rv_timer_random	0.690s	20.348us	1	1	100.00
V1	csr_hw_reset	rv_timer_csr_hw_reset	0.700s	55.108us	1	1	100.00
V1	csr_rw	rv_timer_csr_rw	0.670s	121.797us	1	1	100.00
V1	csr_bit_bash	rv_timer_csr_bit_bash	2.450s	91.011us	1	1	100.00
V1	csr_aliasing	rv_timer_csr_aliasing	0.740s	42.484us	1	1	100.00
V1	csr_mem_rw_with_rand_reset	rv_timer_csr_mem_rw_with_rand_reset	1.110s	87.345us	1	1	100.00
V1	regwen_csr_and_corresponding_lockable_csr	rv_timer_csr_rw	0.670s	121.797us	1	1	100.00
		rv_timer_csr_aliasing	0.740s	42.484us	1	1	100.00
V1		TOTAL			6	6	100.00
V2	random_reset	rv_timer_random_reset	0.710s	173.774us	1	1	100.00
V2	disabled	rv_timer_disabled	0.950s	1.644ms	1	1	100.00
V2	cfg_update_on_fly	rv_timer_cfg_update_on_fly	8.188m	1.246s	1	1	100.00
V2	no_interrupt_test	rv_timer_cfg_update_on_fly	8.188m	1.246s	1	1	100.00
V2	stress	rv_timer_stress_all	0.780s	102.768us	1	1	100.00
V2	alert_test	rv_timer_alert_test	0.660s	48.998us	1	1	100.00
V2	intr_test	rv_timer_intr_test	0.700s	17.369us	1	1	100.00
V2	tl_d_oob_addr_access	rv_timer_tl_errors	1.260s	26.521us	1	1	100.00
V2	tl_d_illegal_access	rv_timer_tl_errors	1.260s	26.521us	1	1	100.00
V2	tl_d_outstanding_access	rv_timer_csr_hw_reset	0.700s	55.108us	1	1	100.00
		rv_timer_csr_rw	0.670s	121.797us	1	1	100.00
		rv_timer_csr_aliasing	0.740s	42.484us	1	1	100.00
		rv_timer_same_csr_outstanding	0.840s	62.579us	1	1	100.00
V2	tl_d_partial_access	rv_timer_csr_hw_reset	0.700s	55.108us	1	1	100.00
		rv_timer_csr_rw	0.670s	121.797us	1	1	100.00
		rv_timer_csr_aliasing	0.740s	42.484us	1	1	100.00
		rv_timer_same_csr_outstanding	0.840s	62.579us	1	1	100.00
V2		TOTAL			8	8	100.00
V2S	tl_intg_err	rv_timer_sec_cm	1.100s	125.726us	1	1	100.00
		rv_timer_tl_intg_err	1.680s	124.879us	1	1	100.00
V2S	sec_cm_bus_integrity	rv_timer_tl_intg_err	1.680s	124.879us	1	1	100.00
V2S		TOTAL			2	2	100.00
V3	min_value	rv_timer_min	0.770s	40.282us	1	1	100.00
V3	max_value	rv_timer_max	0.640s	46.261us	1	1	100.00
V3	stress_all_with_rand_reset	rv_timer_stress_all_with_rand_reset	10.000s	7.039ms	1	1	100.00
V3		TOTAL			3	3	100.00
		TOTAL			19	19	100.00