ENTROPY_SRC/RNG_16BITS Simulation Results

Thursday September 11 2025 16:03:02 UTC

GitHub Revision: 975e648

Branch: master

Testplan

Simulator: XCELIUM

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	entropy_src_smoke	4.000s	114.187us	1	1	100.00
V1	csr_hw_reset	entropy_src_csr_hw_reset	3.000s	111.541us	1	1	100.00
V1	csr_rw	entropy_src_csr_rw	3.000s	18.161us	1	1	100.00
V1	csr_bit_bash	entropy_src_csr_bit_bash	15.000s	2.454ms	1	1	100.00
V1	csr_aliasing	entropy_src_csr_aliasing	7.000s	763.333us	1	1	100.00
V1	csr_mem_rw_with_rand_reset	entropy_src_csr_mem_rw_with_rand_reset	3.000s	42.863us	1	1	100.00
V1	regwen_csr_and_corresponding_lockable_csr	entropy_src_csr_rw	3.000s	18.161us	1	1	100.00
		entropy_src_csr_aliasing	7.000s	763.333us	1	1	100.00
V1		TOTAL			6	6	100.00
V2	firmware	entropy_src_smoke	4.000s	114.187us	1	1	100.00
		entropy_src_rng	28.000s	14.227ms	1	1	100.00
		entropy_src_fw_ov	1.800m	8.040ms	0	1	0.00
V2	firmware_mode	entropy_src_fw_ov	1.800m	8.040ms	0	1	0.00
V2	rng_mode	entropy_src_rng	28.000s	14.227ms	1	1	100.00
V2	rng_max_rate	entropy_src_rng_max_rate	2.933m	14.212ms	1	1	100.00
V2	health_checks	entropy_src_rng	28.000s	14.227ms	1	1	100.00
V2	conditioning	entropy_src_rng	28.000s	14.227ms	1	1	100.00
V2	interrupts	entropy_src_rng	28.000s	14.227ms	1	1	100.00
		entropy_src_intr	3.000s	24.305us	1	1	100.00
V2	alerts	entropy_src_rng	28.000s	14.227ms	1	1	100.00
		entropy_src_functional_alerts	7.000s	612.832us	1	1	100.00
V2	stress_all	entropy_src_stress_all	8.000s	89.379us	1	1	100.00
V2	functional_errors	entropy_src_functional_errors	3.000s	98.933us	1	1	100.00
V2	firmware_ov_read_contiguous_data	entropy_src_fw_ov_contiguous	42.000s	1.345ms	1	1	100.00
V2	intr_test	entropy_src_intr_test	3.000s	36.241us	1	1	100.00
V2	alert_test	entropy_src_alert_test	3.000s	24.153us	1	1	100.00
V2	tl_d_oob_addr_access	entropy_src_tl_errors	6.000s	216.134us	1	1	100.00
V2	tl_d_illegal_access	entropy_src_tl_errors	6.000s	216.134us	1	1	100.00
V2	tl_d_outstanding_access	entropy_src_csr_hw_reset	3.000s	111.541us	1	1	100.00
		entropy_src_csr_rw	3.000s	18.161us	1	1	100.00
		entropy_src_csr_aliasing	7.000s	763.333us	1	1	100.00
		entropy_src_same_csr_outstanding	4.000s	92.826us	1	1	100.00
V2	tl_d_partial_access	entropy_src_csr_hw_reset	3.000s	111.541us	1	1	100.00
		entropy_src_csr_rw	3.000s	18.161us	1	1	100.00
		entropy_src_csr_aliasing	7.000s	763.333us	1	1	100.00
		entropy_src_same_csr_outstanding	4.000s	92.826us	1	1	100.00
V2		TOTAL			11	12	91.67
V2S	tl_intg_err	entropy_src_sec_cm	3.000s	182.214us	1	1	100.00
		entropy_src_tl_intg_err	5.000s	352.519us	1	1	100.00
V2S	sec_cm_config_regwen	entropy_src_rng	28.000s	14.227ms	1	1	100.00
		entropy_src_cfg_regwen	2.000s	48.686us	1	1	100.00
V2S	sec_cm_config_mubi	entropy_src_rng	28.000s	14.227ms	1	1	100.00
V2S	sec_cm_config_redun	entropy_src_rng	28.000s	14.227ms	1	1	100.00
V2S	sec_cm_intersig_mubi	entropy_src_rng	28.000s	14.227ms	1	1	100.00
		entropy_src_fw_ov	1.800m	8.040ms	0	1	0.00
V2S	sec_cm_main_sm_fsm_sparse	entropy_src_functional_errors	3.000s	98.933us	1	1	100.00
		entropy_src_sec_cm	3.000s	182.214us	1	1	100.00
V2S	sec_cm_ack_sm_fsm_sparse	entropy_src_functional_errors	3.000s	98.933us	1	1	100.00
		entropy_src_sec_cm	3.000s	182.214us	1	1	100.00
V2S	sec_cm_rng_bkgn_chk	entropy_src_rng	28.000s	14.227ms	1	1	100.00
V2S	sec_cm_fifo_ctr_redun	entropy_src_functional_errors	3.000s	98.933us	1	1	100.00
		entropy_src_sec_cm	3.000s	182.214us	1	1	100.00
V2S	sec_cm_ctr_redun	entropy_src_functional_errors	3.000s	98.933us	1	1	100.00
		entropy_src_sec_cm	3.000s	182.214us	1	1	100.00
V2S	sec_cm_ctr_local_esc	entropy_src_functional_errors	3.000s	98.933us	1	1	100.00
V2S	sec_cm_esfinal_rdata_bus_consistency	entropy_src_functional_alerts	7.000s	612.832us	1	1	100.00
V2S	sec_cm_tile_link_bus_integrity	entropy_src_tl_intg_err	5.000s	352.519us	1	1	100.00
V2S		TOTAL			3	3	100.00
V3	external_health_tests	entropy_src_rng_with_xht_rsps	1.633m	17.040ms	1	1	100.00
V3		TOTAL			1	1	100.00
		TOTAL			21	22	95.45

Failure Buckets

• UVM_ERROR (entropy_src_scoreboard.sv:2116) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [*] vs * [*]) reg name: entropy_src_reg_block.err_code has 1 failures:
  • Test entropy_src_fw_ov has 1 failures.

    • 0.entropy_src_fw_ov.111550509170489749546734682395682347881724537693503725766362422381282595360221
      Line 658, in log /nightly/current_run/scratch/master/entropy_src-sim-xcelium/0.entropy_src_fw_ov/latest/run.log

        UVM_ERROR @ 8039653363 ps: (entropy_src_scoreboard.sv:2116) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (1048576 [0x100000] vs 3145728 [0x300000]) reg name: entropy_src_reg_block.err_code
        UVM_INFO @ 8039653363 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---