| V1 |
smoke |
keymgr_dpe_smoke |
14.160s |
1.600ms |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
keymgr_dpe_csr_hw_reset |
0.990s |
23.684us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
keymgr_dpe_csr_rw |
1.110s |
80.791us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
keymgr_dpe_csr_bit_bash |
2.960s |
180.568us |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
keymgr_dpe_csr_aliasing |
3.250s |
350.679us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
keymgr_dpe_csr_mem_rw_with_rand_reset |
0.830s |
20.346us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
keymgr_dpe_csr_rw |
1.110s |
80.791us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_csr_aliasing |
3.250s |
350.679us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
6 |
6 |
100.00 |
| V2 |
intr_test |
keymgr_dpe_intr_test |
0.710s |
12.165us |
1 |
1 |
100.00 |
| V2 |
alert_test |
keymgr_dpe_alert_test |
0.770s |
26.106us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
keymgr_dpe_tl_errors |
1.690s |
34.344us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
keymgr_dpe_tl_errors |
1.690s |
34.344us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
keymgr_dpe_csr_hw_reset |
0.990s |
23.684us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_csr_rw |
1.110s |
80.791us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_csr_aliasing |
3.250s |
350.679us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_same_csr_outstanding |
1.150s |
714.984us |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
keymgr_dpe_csr_hw_reset |
0.990s |
23.684us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_csr_rw |
1.110s |
80.791us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_csr_aliasing |
3.250s |
350.679us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_same_csr_outstanding |
1.150s |
714.984us |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
4 |
4 |
100.00 |
| V2S |
tl_intg_err |
keymgr_dpe_sec_cm |
10.480s |
697.189us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_tl_intg_err |
2.380s |
78.548us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_update_error |
keymgr_dpe_shadow_reg_errors |
1.180s |
198.893us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_read_clear_staged_value |
keymgr_dpe_shadow_reg_errors |
1.180s |
198.893us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_storage_error |
keymgr_dpe_shadow_reg_errors |
1.180s |
198.893us |
1 |
1 |
100.00 |
| V2S |
shadowed_reset_glitch |
keymgr_dpe_shadow_reg_errors |
1.180s |
198.893us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_update_error_with_csr_rw |
keymgr_dpe_shadow_reg_errors_with_csr_rw |
3.480s |
433.602us |
1 |
1 |
100.00 |
| V2S |
prim_count_check |
keymgr_dpe_sec_cm |
10.480s |
697.189us |
1 |
1 |
100.00 |
| V2S |
prim_fsm_check |
keymgr_dpe_sec_cm |
10.480s |
697.189us |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
4 |
4 |
100.00 |
|
|
TOTAL |
|
|
14 |
14 |
100.00 |