cf445d0| Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
|---|---|---|---|---|---|---|---|
| V1 | smoke | aon_timer_smoke | 22.661s | 0 | 1 | 0.00 | |
| V1 | csr_hw_reset | aon_timer_csr_hw_reset | 1.250s | 691.629us | 1 | 1 | 100.00 |
| V1 | csr_rw | aon_timer_csr_rw | 1.040s | 427.799us | 1 | 1 | 100.00 |
| V1 | csr_bit_bash | aon_timer_csr_bit_bash | 5.110s | 13.764ms | 1 | 1 | 100.00 |
| V1 | csr_aliasing | aon_timer_csr_aliasing | 1.180s | 568.108us | 1 | 1 | 100.00 |
| V1 | csr_mem_rw_with_rand_reset | aon_timer_csr_mem_rw_with_rand_reset | 27.106s | 0 | 1 | 0.00 | |
| V1 | regwen_csr_and_corresponding_lockable_csr | aon_timer_csr_rw | 1.040s | 427.799us | 1 | 1 | 100.00 |
| aon_timer_csr_aliasing | 1.180s | 568.108us | 1 | 1 | 100.00 | ||
| V1 | mem_walk | aon_timer_mem_walk | 0.860s | 513.981us | 1 | 1 | 100.00 |
| V1 | mem_partial_access | aon_timer_mem_partial_access | 16.437s | 0 | 1 | 0.00 | |
| V1 | TOTAL | 5 | 8 | 62.50 | |||
| V2 | prescaler | aon_timer_prescaler | 8.870s | 26.573ms | 1 | 1 | 100.00 |
| V2 | jump | aon_timer_jump | 28.591s | 0 | 1 | 0.00 | |
| V2 | stress_all | aon_timer_stress_all | 3.770s | 2.930ms | 1 | 1 | 100.00 |
| V2 | alert_test | aon_timer_alert_test | 0.890s | 302.499us | 1 | 1 | 100.00 |
| V2 | intr_test | aon_timer_intr_test | 0.880s | 525.694us | 1 | 1 | 100.00 |
| V2 | tl_d_oob_addr_access | aon_timer_tl_errors | 22.165s | 0 | 1 | 0.00 | |
| V2 | tl_d_illegal_access | aon_timer_tl_errors | 22.165s | 0 | 1 | 0.00 | |
| V2 | tl_d_outstanding_access | aon_timer_csr_hw_reset | 1.250s | 691.629us | 1 | 1 | 100.00 |
| aon_timer_csr_rw | 1.040s | 427.799us | 1 | 1 | 100.00 | ||
| aon_timer_csr_aliasing | 1.180s | 568.108us | 1 | 1 | 100.00 | ||
| aon_timer_same_csr_outstanding | 30.469s | 0 | 1 | 0.00 | |||
| V2 | tl_d_partial_access | aon_timer_csr_hw_reset | 1.250s | 691.629us | 1 | 1 | 100.00 |
| aon_timer_csr_rw | 1.040s | 427.799us | 1 | 1 | 100.00 | ||
| aon_timer_csr_aliasing | 1.180s | 568.108us | 1 | 1 | 100.00 | ||
| aon_timer_same_csr_outstanding | 30.469s | 0 | 1 | 0.00 | |||
| V2 | TOTAL | 4 | 7 | 57.14 | |||
| V2S | tl_intg_err | aon_timer_sec_cm | 2.290s | 7.536ms | 1 | 1 | 100.00 |
| aon_timer_tl_intg_err | 3.220s | 8.070ms | 1 | 1 | 100.00 | ||
| V2S | sec_cm_bus_integrity | aon_timer_tl_intg_err | 3.220s | 8.070ms | 1 | 1 | 100.00 |
| V2S | TOTAL | 2 | 2 | 100.00 | |||
| V3 | max_threshold | aon_timer_smoke_max_thold | 1.070s | 498.653us | 1 | 1 | 100.00 |
| V3 | min_threshold | aon_timer_smoke_min_thold | 1.260s | 704.277us | 1 | 1 | 100.00 |
| V3 | wkup_count_hi_cdc | aon_timer_wkup_count_cdc_hi | 3.750s | 3.670ms | 1 | 1 | 100.00 |
| V3 | custom_intr | aon_timer_custom_intr | 0.720s | 477.735us | 1 | 1 | 100.00 |
| V3 | alternating_on_off | aon_timer_alternating_enable_on_off | 3.600s | 4.321ms | 1 | 1 | 100.00 |
| V3 | stress_all_with_rand_reset | aon_timer_stress_all_with_rand_reset | 8.330s | 6.274ms | 1 | 1 | 100.00 |
| V3 | TOTAL | 6 | 6 | 100.00 | |||
| TOTAL | 17 | 23 | 73.91 |
Job returned non-zero exit code has 6 failures:
Test aon_timer_smoke has 1 failures.
0.aon_timer_smoke.64415247510489547114268976662376409151876115686533667124139171442339444829962
Log /nightly/current_run/scratch/master/aon_timer-sim-vcs/0.aon_timer_smoke/latest/run.log
Chronologic VCS simulator copyright 1991-2023
Contains Synopsys proprietary information.
Compiler version U-2023.03-SP2_Full64; Runtime version U-2023.03-SP2_Full64; Sep 15 16:40 2025
Feature removed during lmreread, or wrong
SERVER line hostid.
Check your license file.
Please contact VCS Customer Support at 1-800-VERILOG for more information.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:186: simulate] Error 255
Test aon_timer_jump has 1 failures.
0.aon_timer_jump.36395673962388216936673546800838481378249360770430827324411271263090704131250
Log /nightly/current_run/scratch/master/aon_timer-sim-vcs/0.aon_timer_jump/latest/run.log
Chronologic VCS simulator copyright 1991-2023
Contains Synopsys proprietary information.
Compiler version U-2023.03-SP2_Full64; Runtime version U-2023.03-SP2_Full64; Sep 15 16:40 2025
Feature removed during lmreread, or wrong
SERVER line hostid.
Check your license file.
Please contact VCS Customer Support at 1-800-VERILOG for more information.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:186: simulate] Error 255
Test aon_timer_tl_errors has 1 failures.
0.aon_timer_tl_errors.1429051213230557058776081113198959551077627015381768666013832794450059753922
Log /nightly/current_run/scratch/master/aon_timer-sim-vcs/0.aon_timer_tl_errors/latest/run.log
Chronologic VCS simulator copyright 1991-2023
Contains Synopsys proprietary information.
Compiler version U-2023.03-SP2_Full64; Runtime version U-2023.03-SP2_Full64; Sep 15 16:42 2025
Feature removed during lmreread, or wrong
SERVER line hostid.
Check your license file.
Please contact VCS Customer Support at 1-800-VERILOG for more information.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:186: simulate] Error 255
Test aon_timer_mem_partial_access has 1 failures.
0.aon_timer_mem_partial_access.25613834723861442686656978968133847394463577354045057274171232078973114911172
Log /nightly/current_run/scratch/master/aon_timer-sim-vcs/0.aon_timer_mem_partial_access/latest/run.log
Chronologic VCS simulator copyright 1991-2023
Contains Synopsys proprietary information.
Compiler version U-2023.03-SP2_Full64; Runtime version U-2023.03-SP2_Full64; Sep 15 16:42 2025
Feature removed during lmreread, or wrong
SERVER line hostid.
Check your license file.
Please contact VCS Customer Support at 1-800-VERILOG for more information.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:186: simulate] Error 255
Test aon_timer_same_csr_outstanding has 1 failures.
0.aon_timer_same_csr_outstanding.61301630978397489034378693288508040434216356425216102057438677836191648679361
Log /nightly/current_run/scratch/master/aon_timer-sim-vcs/0.aon_timer_same_csr_outstanding/latest/run.log
Chronologic VCS simulator copyright 1991-2023
Contains Synopsys proprietary information.
Compiler version U-2023.03-SP2_Full64; Runtime version U-2023.03-SP2_Full64; Sep 15 16:43 2025
Feature removed during lmreread, or wrong
SERVER line hostid.
Check your license file.
Please contact VCS Customer Support at 1-800-VERILOG for more information.
make: *** [/nightly/current_run/opentitan/hw/dv/tools/dvsim/sim.mk:186: simulate] Error 255
... and 1 more tests.