MBX Simulation Results

Monday September 15 2025 16:25:37 UTC

GitHub Revision: cf445d0

Branch: master

Testplan

Simulator: XCELIUM

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 mbx_smoke mbx_smoke 42.000s 2.274ms 1 1 100.00
V1 csr_hw_reset mbx_csr_hw_reset 26.000s 0 1 0.00
V1 csr_rw mbx_csr_rw 30.000s 0 1 0.00
V1 csr_bit_bash mbx_csr_bit_bash 18.000s 0 1 0.00
V1 csr_aliasing mbx_csr_aliasing 38.000s 0 1 0.00
V1 csr_mem_rw_with_rand_reset mbx_csr_mem_rw_with_rand_reset 25.000s 0 1 0.00
V1 regwen_csr_and_corresponding_lockable_csr mbx_csr_rw 30.000s 0 1 0.00
mbx_csr_aliasing 38.000s 0 1 0.00
V1 TOTAL 1 6 16.67
V2 mbx_stress mbx_stress 26.000s 0 1 0.00
V2 mbx_max_activity mbx_stress_zero_delays 15.000s 29.568us 0 1 0.00
V2 mbx_imbx_oob mbx_imbx_oob 46.000s 0 1 0.00
V2 mbx_doe_intr_msg mbx_doe_intr_msg 22.000s 0 1 0.00
V2 alert_test mbx_alert_test 12.000s 66.510us 1 1 100.00
V2 intr_test mbx_intr_test 22.000s 0 1 0.00
V2 tl_d_oob_addr_access mbx_tl_errors 38.000s 0 1 0.00
V2 tl_d_illegal_access mbx_tl_errors 38.000s 0 1 0.00
V2 tl_d_outstanding_access mbx_csr_hw_reset 26.000s 0 1 0.00
mbx_csr_rw 30.000s 0 1 0.00
mbx_csr_aliasing 38.000s 0 1 0.00
mbx_same_csr_outstanding 20.000s 0 1 0.00
V2 tl_d_partial_access mbx_csr_hw_reset 26.000s 0 1 0.00
mbx_csr_rw 30.000s 0 1 0.00
mbx_csr_aliasing 38.000s 0 1 0.00
mbx_same_csr_outstanding 20.000s 0 1 0.00
V2 TOTAL 1 8 12.50
V2S tl_intg_err mbx_tl_intg_err 21.000s 0 1 0.00
mbx_sec_cm 29.000s 0 1 0.00
V2S TOTAL 0 2 0.00
TOTAL 2 16 12.50

Failure Buckets