RV_TIMER Simulation Results

Tuesday September 16 2025 16:05:40 UTC

GitHub Revision: 572e2c3

Branch: master

Testplan

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	random	rv_timer_random	0.530s	16.499us	1	1	100.00
V1	csr_hw_reset	rv_timer_csr_hw_reset	0.540s	70.894us	1	1	100.00
V1	csr_rw	rv_timer_csr_rw	0.520s	17.031us	1	1	100.00
V1	csr_bit_bash	rv_timer_csr_bit_bash	1.100s	39.383us	1	1	100.00
V1	csr_aliasing	rv_timer_csr_aliasing	0.720s	85.488us	1	1	100.00
V1	csr_mem_rw_with_rand_reset	rv_timer_csr_mem_rw_with_rand_reset	0.650s	21.697us	1	1	100.00
V1	regwen_csr_and_corresponding_lockable_csr	rv_timer_csr_rw	0.520s	17.031us	1	1	100.00
		rv_timer_csr_aliasing	0.720s	85.488us	1	1	100.00
V1		TOTAL			6	6	100.00
V2	random_reset	rv_timer_random_reset	0.620s	69.996us	1	1	100.00
V2	disabled	rv_timer_disabled	0.940s	867.687us	1	1	100.00
V2	cfg_update_on_fly	rv_timer_cfg_update_on_fly	6.557m	427.305ms	1	1	100.00
V2	no_interrupt_test	rv_timer_cfg_update_on_fly	6.557m	427.305ms	1	1	100.00
V2	stress	rv_timer_stress_all	1.460s	938.760us	1	1	100.00
V2	alert_test	rv_timer_alert_test	0.540s	46.039us	1	1	100.00
V2	intr_test	rv_timer_intr_test	0.570s	126.621us	1	1	100.00
V2	tl_d_oob_addr_access	rv_timer_tl_errors	1.210s	255.382us	1	1	100.00
V2	tl_d_illegal_access	rv_timer_tl_errors	1.210s	255.382us	1	1	100.00
V2	tl_d_outstanding_access	rv_timer_csr_hw_reset	0.540s	70.894us	1	1	100.00
		rv_timer_csr_rw	0.520s	17.031us	1	1	100.00
		rv_timer_csr_aliasing	0.720s	85.488us	1	1	100.00
		rv_timer_same_csr_outstanding	0.560s	182.737us	1	1	100.00
V2	tl_d_partial_access	rv_timer_csr_hw_reset	0.540s	70.894us	1	1	100.00
		rv_timer_csr_rw	0.520s	17.031us	1	1	100.00
		rv_timer_csr_aliasing	0.720s	85.488us	1	1	100.00
		rv_timer_same_csr_outstanding	0.560s	182.737us	1	1	100.00
V2		TOTAL			8	8	100.00
V2S	tl_intg_err	rv_timer_sec_cm	0.760s	248.433us	1	1	100.00
		rv_timer_tl_intg_err	0.910s	162.919us	1	1	100.00
V2S	sec_cm_bus_integrity	rv_timer_tl_intg_err	0.910s	162.919us	1	1	100.00
V2S		TOTAL			2	2	100.00
V3	min_value	rv_timer_min	0.570s	15.634us	1	1	100.00
V3	max_value	rv_timer_max	0.580s	17.820us	1	1	100.00
V3	stress_all_with_rand_reset	rv_timer_stress_all_with_rand_reset	17.330s	14.165ms	1	1	100.00
V3		TOTAL			3	3	100.00
		TOTAL			19	19	100.00