KMAC/MASKED Simulation Results

Thursday September 18 2025 16:06:50 UTC

GitHub Revision: bddb67a

Branch: master

Testplan

Simulator: VCS

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke kmac_smoke 16.375s 0 1 0.00
V1 csr_hw_reset kmac_csr_hw_reset 0.790s 17.111us 1 1 100.00
V1 csr_rw kmac_csr_rw 0.800s 38.634us 1 1 100.00
V1 csr_bit_bash kmac_csr_bit_bash 12.020s 997.634us 1 1 100.00
V1 csr_aliasing kmac_csr_aliasing 6.210s 736.511us 1 1 100.00
V1 csr_mem_rw_with_rand_reset kmac_csr_mem_rw_with_rand_reset 1.170s 47.244us 1 1 100.00
V1 regwen_csr_and_corresponding_lockable_csr kmac_csr_rw 0.800s 38.634us 1 1 100.00
kmac_csr_aliasing 6.210s 736.511us 1 1 100.00
V1 mem_walk kmac_mem_walk 0.690s 30.902us 1 1 100.00
V1 mem_partial_access kmac_mem_partial_access 0.950s 93.379us 1 1 100.00
V1 TOTAL 7 8 87.50
V2 long_msg_and_output kmac_long_msg_and_output 26.810s 15.498ms 1 1 100.00
V2 burst_write kmac_burst_write 4.673m 26.672ms 1 1 100.00
V2 test_vectors kmac_test_vectors_sha3_224 22.165s 0 1 0.00
kmac_test_vectors_sha3_256 25.376m 354.585ms 1 1 100.00
kmac_test_vectors_sha3_384 21.270s 2.172ms 1 1 100.00
kmac_test_vectors_sha3_512 15.373m 86.348ms 1 1 100.00
kmac_test_vectors_shake_128 2.054m 30.235ms 1 1 100.00
kmac_test_vectors_shake_256 25.344m 238.262ms 1 1 100.00
kmac_test_vectors_kmac 1.640s 180.417us 1 1 100.00
kmac_test_vectors_kmac_xof 1.820s 89.595us 1 1 100.00
V2 sideload kmac_sideload 28.130s 555.516us 1 1 100.00
V2 app kmac_app 31.650s 17.914ms 1 1 100.00
V2 app_with_partial_data kmac_app_with_partial_data 19.618s 0 1 0.00
V2 entropy_refresh kmac_entropy_refresh 3.532m 15.965ms 1 1 100.00
V2 error kmac_error 4.194m 19.242ms 1 1 100.00
V2 key_error kmac_key_error 7.020s 2.677ms 1 1 100.00
V2 sideload_invalid kmac_sideload_invalid 4.600s 189.765us 1 1 100.00
V2 edn_timeout_error kmac_edn_timeout_error 0.910s 81.234us 1 1 100.00
V2 entropy_mode_error kmac_entropy_mode_error 1.000s 41.609us 1 1 100.00
V2 entropy_ready_error kmac_entropy_ready_error 26.802s 0 1 0.00
V2 lc_escalation kmac_lc_escalation 1.140s 55.171us 1 1 100.00
V2 stress_all kmac_stress_all 5.570s 1.041ms 1 1 100.00
V2 intr_test kmac_intr_test 0.700s 51.173us 1 1 100.00
V2 alert_test kmac_alert_test 0.700s 25.668us 1 1 100.00
V2 tl_d_oob_addr_access kmac_tl_errors 1.300s 250.489us 1 1 100.00
V2 tl_d_illegal_access kmac_tl_errors 1.300s 250.489us 1 1 100.00
V2 tl_d_outstanding_access kmac_csr_hw_reset 0.790s 17.111us 1 1 100.00
kmac_csr_rw 0.800s 38.634us 1 1 100.00
kmac_csr_aliasing 6.210s 736.511us 1 1 100.00
kmac_same_csr_outstanding 1.200s 216.232us 1 1 100.00
V2 tl_d_partial_access kmac_csr_hw_reset 0.790s 17.111us 1 1 100.00
kmac_csr_rw 0.800s 38.634us 1 1 100.00
kmac_csr_aliasing 6.210s 736.511us 1 1 100.00
kmac_same_csr_outstanding 1.200s 216.232us 1 1 100.00
V2 TOTAL 23 26 88.46
V2S shadow_reg_update_error kmac_shadow_reg_errors 1.240s 266.181us 1 1 100.00
V2S shadow_reg_read_clear_staged_value kmac_shadow_reg_errors 1.240s 266.181us 1 1 100.00
V2S shadow_reg_storage_error kmac_shadow_reg_errors 1.240s 266.181us 1 1 100.00
V2S shadowed_reset_glitch kmac_shadow_reg_errors 1.240s 266.181us 1 1 100.00
V2S shadow_reg_update_error_with_csr_rw kmac_shadow_reg_errors_with_csr_rw 1.830s 97.673us 1 1 100.00
V2S tl_intg_err kmac_sec_cm 52.040s 9.505ms 1 1 100.00
kmac_tl_intg_err 2.120s 716.301us 1 1 100.00
V2S sec_cm_bus_integrity kmac_tl_intg_err 2.120s 716.301us 1 1 100.00
V2S sec_cm_lc_escalate_en_intersig_mubi kmac_lc_escalation 1.140s 55.171us 1 1 100.00
V2S sec_cm_sw_key_key_masking kmac_smoke 16.375s 0 1 0.00
V2S sec_cm_key_sideload kmac_sideload 28.130s 555.516us 1 1 100.00
V2S sec_cm_cfg_shadowed_config_shadow kmac_shadow_reg_errors 1.240s 266.181us 1 1 100.00
V2S sec_cm_fsm_sparse kmac_sec_cm 52.040s 9.505ms 1 1 100.00
V2S sec_cm_ctr_redun kmac_sec_cm 52.040s 9.505ms 1 1 100.00
V2S sec_cm_packer_ctr_redun kmac_sec_cm 52.040s 9.505ms 1 1 100.00
V2S sec_cm_cfg_shadowed_config_regwen kmac_smoke 16.375s 0 1 0.00
V2S sec_cm_fsm_global_esc kmac_lc_escalation 1.140s 55.171us 1 1 100.00
V2S sec_cm_fsm_local_esc kmac_sec_cm 52.040s 9.505ms 1 1 100.00
V2S sec_cm_absorbed_ctrl_mubi kmac_mubi 0 1 0.00
V2S sec_cm_sw_cmd_ctrl_sparse kmac_smoke 16.375s 0 1 0.00
V2S TOTAL 4 5 80.00
V3 stress_all_with_rand_reset kmac_stress_all_with_rand_reset 2.647m 3.178ms 1 1 100.00
V3 TOTAL 1 1 100.00
TOTAL 35 40 87.50

Failure Buckets