ENTROPY_SRC/RNG_16BITS Simulation Results

Monday September 22 2025 16:09:37 UTC

GitHub Revision: 359e412

Branch: master

Testplan

Simulator: XCELIUM

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke entropy_src_smoke 18.000s 0 1 0.00
V1 csr_hw_reset entropy_src_csr_hw_reset 49.000s 0 1 0.00
V1 csr_rw entropy_src_csr_rw 17.000s 0 1 0.00
V1 csr_bit_bash entropy_src_csr_bit_bash 25.000s 0 1 0.00
V1 csr_aliasing entropy_src_csr_aliasing 25.000s 0 1 0.00
V1 csr_mem_rw_with_rand_reset entropy_src_csr_mem_rw_with_rand_reset 1.067m 0 1 0.00
V1 regwen_csr_and_corresponding_lockable_csr entropy_src_csr_rw 17.000s 0 1 0.00
entropy_src_csr_aliasing 25.000s 0 1 0.00
V1 TOTAL 0 6 0.00
V2 firmware entropy_src_smoke 18.000s 0 1 0.00
entropy_src_rng 34.000s 0 1 0.00
entropy_src_fw_ov 21.000s 0 1 0.00
V2 firmware_mode entropy_src_fw_ov 21.000s 0 1 0.00
V2 rng_mode entropy_src_rng 34.000s 0 1 0.00
V2 rng_max_rate entropy_src_rng_max_rate 29.000s 0 1 0.00
V2 health_checks entropy_src_rng 34.000s 0 1 0.00
V2 conditioning entropy_src_rng 34.000s 0 1 0.00
V2 interrupts entropy_src_rng 34.000s 0 1 0.00
entropy_src_intr 50.000s 0 1 0.00
V2 alerts entropy_src_rng 34.000s 0 1 0.00
entropy_src_functional_alerts 17.000s 0 1 0.00
V2 stress_all entropy_src_stress_all 26.000s 0 1 0.00
V2 functional_errors entropy_src_functional_errors 29.000s 0 1 0.00
V2 firmware_ov_read_contiguous_data entropy_src_fw_ov_contiguous 38.000s 0 1 0.00
V2 intr_test entropy_src_intr_test 4.000s 22.092us 1 1 100.00
V2 alert_test entropy_src_alert_test 29.000s 0 1 0.00
V2 tl_d_oob_addr_access entropy_src_tl_errors 17.000s 0 1 0.00
V2 tl_d_illegal_access entropy_src_tl_errors 17.000s 0 1 0.00
V2 tl_d_outstanding_access entropy_src_csr_hw_reset 49.000s 0 1 0.00
entropy_src_csr_rw 17.000s 0 1 0.00
entropy_src_csr_aliasing 25.000s 0 1 0.00
entropy_src_same_csr_outstanding 30.000s 0 1 0.00
V2 tl_d_partial_access entropy_src_csr_hw_reset 49.000s 0 1 0.00
entropy_src_csr_rw 17.000s 0 1 0.00
entropy_src_csr_aliasing 25.000s 0 1 0.00
entropy_src_same_csr_outstanding 30.000s 0 1 0.00
V2 TOTAL 1 12 8.33
V2S tl_intg_err entropy_src_sec_cm 29.000s 0 1 0.00
entropy_src_tl_intg_err 17.000s 0 1 0.00
V2S sec_cm_config_regwen entropy_src_rng 34.000s 0 1 0.00
entropy_src_cfg_regwen 29.000s 0 1 0.00
V2S sec_cm_config_mubi entropy_src_rng 34.000s 0 1 0.00
V2S sec_cm_config_redun entropy_src_rng 34.000s 0 1 0.00
V2S sec_cm_intersig_mubi entropy_src_rng 34.000s 0 1 0.00
entropy_src_fw_ov 21.000s 0 1 0.00
V2S sec_cm_main_sm_fsm_sparse entropy_src_functional_errors 29.000s 0 1 0.00
entropy_src_sec_cm 29.000s 0 1 0.00
V2S sec_cm_ack_sm_fsm_sparse entropy_src_functional_errors 29.000s 0 1 0.00
entropy_src_sec_cm 29.000s 0 1 0.00
V2S sec_cm_rng_bkgn_chk entropy_src_rng 34.000s 0 1 0.00
V2S sec_cm_fifo_ctr_redun entropy_src_functional_errors 29.000s 0 1 0.00
entropy_src_sec_cm 29.000s 0 1 0.00
V2S sec_cm_ctr_redun entropy_src_functional_errors 29.000s 0 1 0.00
entropy_src_sec_cm 29.000s 0 1 0.00
V2S sec_cm_ctr_local_esc entropy_src_functional_errors 29.000s 0 1 0.00
V2S sec_cm_esfinal_rdata_bus_consistency entropy_src_functional_alerts 17.000s 0 1 0.00
V2S sec_cm_tile_link_bus_integrity entropy_src_tl_intg_err 17.000s 0 1 0.00
V2S TOTAL 0 3 0.00
V3 external_health_tests entropy_src_rng_with_xht_rsps 21.000s 0 1 0.00
V3 TOTAL 0 1 0.00
TOTAL 1 22 4.55

Failure Buckets