MBX Simulation Results

Tuesday September 23 2025 16:10:41 UTC

GitHub Revision: 4330c70

Branch: master

Testplan

Simulator: XCELIUM

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 mbx_smoke mbx_smoke 33.000s 0 1 0.00
V1 csr_hw_reset mbx_csr_hw_reset 30.000s 0 1 0.00
V1 csr_rw mbx_csr_rw 35.000s 0 1 0.00
V1 csr_bit_bash mbx_csr_bit_bash 34.000s 0 1 0.00
V1 csr_aliasing mbx_csr_aliasing 21.000s 0 1 0.00
V1 csr_mem_rw_with_rand_reset mbx_csr_mem_rw_with_rand_reset 21.000s 0 1 0.00
V1 regwen_csr_and_corresponding_lockable_csr mbx_csr_rw 35.000s 0 1 0.00
mbx_csr_aliasing 21.000s 0 1 0.00
V1 TOTAL 0 6 0.00
V2 mbx_stress mbx_stress 29.000s 0 1 0.00
V2 mbx_max_activity mbx_stress_zero_delays 46.000s 0 1 0.00
V2 mbx_imbx_oob mbx_imbx_oob 29.000s 0 1 0.00
V2 mbx_doe_intr_msg mbx_doe_intr_msg 25.000s 0 1 0.00
V2 alert_test mbx_alert_test 17.000s 0 1 0.00
V2 intr_test mbx_intr_test 31.000s 0 1 0.00
V2 tl_d_oob_addr_access mbx_tl_errors 30.000s 0 1 0.00
V2 tl_d_illegal_access mbx_tl_errors 30.000s 0 1 0.00
V2 tl_d_outstanding_access mbx_csr_hw_reset 30.000s 0 1 0.00
mbx_csr_rw 35.000s 0 1 0.00
mbx_csr_aliasing 21.000s 0 1 0.00
mbx_same_csr_outstanding 47.000s 0 1 0.00
V2 tl_d_partial_access mbx_csr_hw_reset 30.000s 0 1 0.00
mbx_csr_rw 35.000s 0 1 0.00
mbx_csr_aliasing 21.000s 0 1 0.00
mbx_same_csr_outstanding 47.000s 0 1 0.00
V2 TOTAL 0 8 0.00
V2S tl_intg_err mbx_tl_intg_err 31.000s 0 1 0.00
mbx_sec_cm 30.000s 0 1 0.00
V2S TOTAL 0 2 0.00
TOTAL 0 16 0.00

Failure Buckets