| V1 |
smoke |
aon_timer_smoke |
1.590s |
677.262us |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
aon_timer_csr_hw_reset |
0.980s |
1.104ms |
1 |
1 |
100.00 |
| V1 |
csr_rw |
aon_timer_csr_rw |
0.820s |
533.585us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
aon_timer_csr_bit_bash |
10.350s |
9.433ms |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
aon_timer_csr_aliasing |
0.930s |
614.753us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
aon_timer_csr_mem_rw_with_rand_reset |
1.270s |
378.151us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
aon_timer_csr_rw |
0.820s |
533.585us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
0.930s |
614.753us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
aon_timer_mem_walk |
0.880s |
396.902us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
aon_timer_mem_partial_access |
0.700s |
359.290us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
prescaler |
aon_timer_prescaler |
9.810s |
8.287ms |
1 |
1 |
100.00 |
| V2 |
jump |
aon_timer_jump |
1.130s |
601.337us |
1 |
1 |
100.00 |
| V2 |
stress_all |
aon_timer_stress_all |
31.730s |
26.899ms |
1 |
1 |
100.00 |
| V2 |
alert_test |
aon_timer_alert_test |
0.690s |
451.025us |
1 |
1 |
100.00 |
| V2 |
intr_test |
aon_timer_intr_test |
0.880s |
432.933us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
aon_timer_tl_errors |
1.930s |
449.026us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
aon_timer_tl_errors |
1.930s |
449.026us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
aon_timer_csr_hw_reset |
0.980s |
1.104ms |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
0.820s |
533.585us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
0.930s |
614.753us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
2.030s |
2.077ms |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
aon_timer_csr_hw_reset |
0.980s |
1.104ms |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
0.820s |
533.585us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
0.930s |
614.753us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
2.030s |
2.077ms |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
7 |
7 |
100.00 |
| V2S |
tl_intg_err |
aon_timer_sec_cm |
2.350s |
7.853ms |
1 |
1 |
100.00 |
|
|
aon_timer_tl_intg_err |
3.740s |
8.023ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
aon_timer_tl_intg_err |
3.740s |
8.023ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
2 |
2 |
100.00 |
| V3 |
max_threshold |
aon_timer_smoke_max_thold |
0.910s |
633.774us |
1 |
1 |
100.00 |
| V3 |
min_threshold |
aon_timer_smoke_min_thold |
0.930s |
699.196us |
1 |
1 |
100.00 |
| V3 |
wkup_count_hi_cdc |
aon_timer_wkup_count_cdc_hi |
2.120s |
4.039ms |
1 |
1 |
100.00 |
| V3 |
custom_intr |
aon_timer_custom_intr |
1.340s |
709.365us |
1 |
1 |
100.00 |
| V3 |
alternating_on_off |
aon_timer_alternating_enable_on_off |
5.760s |
3.955ms |
1 |
1 |
100.00 |
| V3 |
stress_all_with_rand_reset |
aon_timer_stress_all_with_rand_reset |
8.160s |
1.999ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
6 |
6 |
100.00 |
|
|
TOTAL |
|
|
23 |
23 |
100.00 |