| V1 |
smoke |
kmac_smoke |
52.860s |
1.764ms |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
kmac_csr_hw_reset |
1.460s |
98.057us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
kmac_csr_rw |
0.950s |
29.042us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
kmac_csr_bit_bash |
14.680s |
1.001ms |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
kmac_csr_aliasing |
3.860s |
871.576us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
kmac_csr_mem_rw_with_rand_reset |
1.940s |
23.960us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
kmac_csr_rw |
0.950s |
29.042us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
3.860s |
871.576us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
kmac_mem_walk |
1.030s |
11.532us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
kmac_mem_partial_access |
1.480s |
32.802us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
long_msg_and_output |
kmac_long_msg_and_output |
37.434m |
171.358ms |
1 |
1 |
100.00 |
| V2 |
burst_write |
kmac_burst_write |
4.144m |
12.069ms |
1 |
1 |
100.00 |
| V2 |
test_vectors |
kmac_test_vectors_sha3_224 |
25.071m |
36.482ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_256 |
28.750s |
3.788ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_384 |
23.679m |
74.271ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_512 |
13.830m |
47.973ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_shake_128 |
2.463m |
15.225ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_shake_256 |
24.123m |
34.522ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_kmac |
2.210s |
339.965us |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_kmac_xof |
2.480s |
122.272us |
1 |
1 |
100.00 |
| V2 |
sideload |
kmac_sideload |
57.550s |
3.981ms |
1 |
1 |
100.00 |
| V2 |
app |
kmac_app |
3.282m |
18.366ms |
1 |
1 |
100.00 |
| V2 |
app_with_partial_data |
kmac_app_with_partial_data |
57.420s |
12.115ms |
1 |
1 |
100.00 |
| V2 |
entropy_refresh |
kmac_entropy_refresh |
24.220s |
2.678ms |
1 |
1 |
100.00 |
| V2 |
error |
kmac_error |
54.500s |
2.083ms |
1 |
1 |
100.00 |
| V2 |
key_error |
kmac_key_error |
3.910s |
1.451ms |
1 |
1 |
100.00 |
| V2 |
sideload_invalid |
kmac_sideload_invalid |
6.860s |
365.819us |
1 |
1 |
100.00 |
| V2 |
edn_timeout_error |
kmac_edn_timeout_error |
1.120s |
68.468us |
1 |
1 |
100.00 |
| V2 |
entropy_mode_error |
kmac_entropy_mode_error |
26.440s |
1.527ms |
1 |
1 |
100.00 |
| V2 |
entropy_ready_error |
kmac_entropy_ready_error |
14.960s |
1.322ms |
1 |
1 |
100.00 |
| V2 |
lc_escalation |
kmac_lc_escalation |
1.740s |
47.121us |
1 |
1 |
100.00 |
| V2 |
stress_all |
kmac_stress_all |
18.580m |
86.882ms |
1 |
1 |
100.00 |
| V2 |
intr_test |
kmac_intr_test |
0.970s |
45.206us |
1 |
1 |
100.00 |
| V2 |
alert_test |
kmac_alert_test |
1.020s |
70.672us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
kmac_tl_errors |
2.430s |
117.521us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
kmac_tl_errors |
2.430s |
117.521us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
kmac_csr_hw_reset |
1.460s |
98.057us |
1 |
1 |
100.00 |
|
|
kmac_csr_rw |
0.950s |
29.042us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
3.860s |
871.576us |
1 |
1 |
100.00 |
|
|
kmac_same_csr_outstanding |
2.080s |
378.996us |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
kmac_csr_hw_reset |
1.460s |
98.057us |
1 |
1 |
100.00 |
|
|
kmac_csr_rw |
0.950s |
29.042us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
3.860s |
871.576us |
1 |
1 |
100.00 |
|
|
kmac_same_csr_outstanding |
2.080s |
378.996us |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
26 |
26 |
100.00 |
| V2S |
shadow_reg_update_error |
kmac_shadow_reg_errors |
2.390s |
67.414us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_read_clear_staged_value |
kmac_shadow_reg_errors |
2.390s |
67.414us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_storage_error |
kmac_shadow_reg_errors |
2.390s |
67.414us |
1 |
1 |
100.00 |
| V2S |
shadowed_reset_glitch |
kmac_shadow_reg_errors |
2.390s |
67.414us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_update_error_with_csr_rw |
kmac_shadow_reg_errors_with_csr_rw |
5.200s |
982.548us |
1 |
1 |
100.00 |
| V2S |
tl_intg_err |
kmac_sec_cm |
33.540s |
4.165ms |
1 |
1 |
100.00 |
|
|
kmac_tl_intg_err |
3.960s |
762.911us |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
kmac_tl_intg_err |
3.960s |
762.911us |
1 |
1 |
100.00 |
| V2S |
sec_cm_lc_escalate_en_intersig_mubi |
kmac_lc_escalation |
1.740s |
47.121us |
1 |
1 |
100.00 |
| V2S |
sec_cm_sw_key_key_masking |
kmac_smoke |
52.860s |
1.764ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_key_sideload |
kmac_sideload |
57.550s |
3.981ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_cfg_shadowed_config_shadow |
kmac_shadow_reg_errors |
2.390s |
67.414us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_sparse |
kmac_sec_cm |
33.540s |
4.165ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_ctr_redun |
kmac_sec_cm |
33.540s |
4.165ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_packer_ctr_redun |
kmac_sec_cm |
33.540s |
4.165ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_cfg_shadowed_config_regwen |
kmac_smoke |
52.860s |
1.764ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_global_esc |
kmac_lc_escalation |
1.740s |
47.121us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_local_esc |
kmac_sec_cm |
33.540s |
4.165ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_absorbed_ctrl_mubi |
kmac_mubi |
37.230s |
7.156ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_sw_cmd_ctrl_sparse |
kmac_smoke |
52.860s |
1.764ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
5 |
5 |
100.00 |
| V3 |
stress_all_with_rand_reset |
kmac_stress_all_with_rand_reset |
1.866m |
1.847ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
1 |
1 |
100.00 |
|
|
TOTAL |
|
|
40 |
40 |
100.00 |