| V1 |
smoke |
aon_timer_smoke |
0.850s |
690.701us |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
aon_timer_csr_hw_reset |
1.520s |
714.819us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
aon_timer_csr_rw |
1.230s |
386.343us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
aon_timer_csr_bit_bash |
13.860s |
13.884ms |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
aon_timer_csr_aliasing |
1.010s |
538.546us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
aon_timer_csr_mem_rw_with_rand_reset |
1.390s |
301.979us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
aon_timer_csr_rw |
1.230s |
386.343us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.010s |
538.546us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
aon_timer_mem_walk |
1.140s |
302.421us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
aon_timer_mem_partial_access |
0.770s |
412.872us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
prescaler |
aon_timer_prescaler |
52.360s |
40.946ms |
1 |
1 |
100.00 |
| V2 |
jump |
aon_timer_jump |
1.980s |
680.047us |
1 |
1 |
100.00 |
| V2 |
stress_all |
aon_timer_stress_all |
1.670s |
2.794ms |
1 |
1 |
100.00 |
| V2 |
alert_test |
aon_timer_alert_test |
1.120s |
441.364us |
1 |
1 |
100.00 |
| V2 |
intr_test |
aon_timer_intr_test |
1.380s |
524.909us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
aon_timer_tl_errors |
1.520s |
655.984us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
aon_timer_tl_errors |
1.520s |
655.984us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
aon_timer_csr_hw_reset |
1.520s |
714.819us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
1.230s |
386.343us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.010s |
538.546us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
5.410s |
2.469ms |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
aon_timer_csr_hw_reset |
1.520s |
714.819us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
1.230s |
386.343us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.010s |
538.546us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
5.410s |
2.469ms |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
7 |
7 |
100.00 |
| V2S |
tl_intg_err |
aon_timer_sec_cm |
4.410s |
8.315ms |
1 |
1 |
100.00 |
|
|
aon_timer_tl_intg_err |
6.210s |
4.195ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
aon_timer_tl_intg_err |
6.210s |
4.195ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
2 |
2 |
100.00 |
| V3 |
max_threshold |
aon_timer_smoke_max_thold |
1.260s |
503.159us |
1 |
1 |
100.00 |
| V3 |
min_threshold |
aon_timer_smoke_min_thold |
0.820s |
648.890us |
1 |
1 |
100.00 |
| V3 |
wkup_count_hi_cdc |
aon_timer_wkup_count_cdc_hi |
6.710s |
3.738ms |
1 |
1 |
100.00 |
| V3 |
custom_intr |
aon_timer_custom_intr |
0.730s |
499.386us |
1 |
1 |
100.00 |
| V3 |
alternating_on_off |
aon_timer_alternating_enable_on_off |
6.670s |
4.311ms |
1 |
1 |
100.00 |
| V3 |
stress_all_with_rand_reset |
aon_timer_stress_all_with_rand_reset |
14.920s |
9.253ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
6 |
6 |
100.00 |
|
|
TOTAL |
|
|
23 |
23 |
100.00 |