| V1 |
smoke |
keymgr_dpe_smoke |
17.200s |
1.452ms |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
keymgr_dpe_csr_hw_reset |
1.180s |
19.134us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
keymgr_dpe_csr_rw |
1.020s |
36.568us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
keymgr_dpe_csr_bit_bash |
5.700s |
176.633us |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
keymgr_dpe_csr_aliasing |
4.750s |
1.089ms |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
keymgr_dpe_csr_mem_rw_with_rand_reset |
1.190s |
44.462us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
keymgr_dpe_csr_rw |
1.020s |
36.568us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_csr_aliasing |
4.750s |
1.089ms |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
6 |
6 |
100.00 |
| V2 |
intr_test |
keymgr_dpe_intr_test |
0.870s |
15.143us |
1 |
1 |
100.00 |
| V2 |
alert_test |
keymgr_dpe_alert_test |
0.930s |
17.268us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
keymgr_dpe_tl_errors |
2.500s |
67.397us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
keymgr_dpe_tl_errors |
2.500s |
67.397us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
keymgr_dpe_csr_hw_reset |
1.180s |
19.134us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_csr_rw |
1.020s |
36.568us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_csr_aliasing |
4.750s |
1.089ms |
1 |
1 |
100.00 |
|
|
keymgr_dpe_same_csr_outstanding |
2.320s |
195.700us |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
keymgr_dpe_csr_hw_reset |
1.180s |
19.134us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_csr_rw |
1.020s |
36.568us |
1 |
1 |
100.00 |
|
|
keymgr_dpe_csr_aliasing |
4.750s |
1.089ms |
1 |
1 |
100.00 |
|
|
keymgr_dpe_same_csr_outstanding |
2.320s |
195.700us |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
4 |
4 |
100.00 |
| V2S |
tl_intg_err |
keymgr_dpe_sec_cm |
8.400s |
10.903ms |
1 |
1 |
100.00 |
|
|
keymgr_dpe_tl_intg_err |
1.770s |
70.164us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_update_error |
keymgr_dpe_shadow_reg_errors |
1.190s |
110.672us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_read_clear_staged_value |
keymgr_dpe_shadow_reg_errors |
1.190s |
110.672us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_storage_error |
keymgr_dpe_shadow_reg_errors |
1.190s |
110.672us |
1 |
1 |
100.00 |
| V2S |
shadowed_reset_glitch |
keymgr_dpe_shadow_reg_errors |
1.190s |
110.672us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_update_error_with_csr_rw |
keymgr_dpe_shadow_reg_errors_with_csr_rw |
4.360s |
208.300us |
1 |
1 |
100.00 |
| V2S |
prim_count_check |
keymgr_dpe_sec_cm |
8.400s |
10.903ms |
1 |
1 |
100.00 |
| V2S |
prim_fsm_check |
keymgr_dpe_sec_cm |
8.400s |
10.903ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
4 |
4 |
100.00 |
|
|
TOTAL |
|
|
14 |
14 |
100.00 |