| V1 |
smoke |
aon_timer_smoke |
1.500s |
710.775us |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
aon_timer_csr_hw_reset |
0.990s |
882.168us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
aon_timer_csr_rw |
0.690s |
355.505us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
aon_timer_csr_bit_bash |
2.720s |
3.551ms |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
aon_timer_csr_aliasing |
1.320s |
483.433us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
aon_timer_csr_mem_rw_with_rand_reset |
0.990s |
297.087us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
aon_timer_csr_rw |
0.690s |
355.505us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.320s |
483.433us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
aon_timer_mem_walk |
0.840s |
442.674us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
aon_timer_mem_partial_access |
1.000s |
416.249us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
prescaler |
aon_timer_prescaler |
11.040s |
8.692ms |
1 |
1 |
100.00 |
| V2 |
jump |
aon_timer_jump |
0.980s |
762.220us |
1 |
1 |
100.00 |
| V2 |
stress_all |
aon_timer_stress_all |
30.580s |
23.024ms |
1 |
1 |
100.00 |
| V2 |
alert_test |
aon_timer_alert_test |
1.320s |
513.417us |
1 |
1 |
100.00 |
| V2 |
intr_test |
aon_timer_intr_test |
0.940s |
481.000us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
aon_timer_tl_errors |
1.610s |
423.380us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
aon_timer_tl_errors |
1.610s |
423.380us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
aon_timer_csr_hw_reset |
0.990s |
882.168us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
0.690s |
355.505us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.320s |
483.433us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
1.400s |
1.855ms |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
aon_timer_csr_hw_reset |
0.990s |
882.168us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
0.690s |
355.505us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.320s |
483.433us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
1.400s |
1.855ms |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
7 |
7 |
100.00 |
| V2S |
tl_intg_err |
aon_timer_sec_cm |
8.930s |
7.956ms |
1 |
1 |
100.00 |
|
|
aon_timer_tl_intg_err |
10.530s |
8.060ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
aon_timer_tl_intg_err |
10.530s |
8.060ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
2 |
2 |
100.00 |
| V3 |
max_threshold |
aon_timer_smoke_max_thold |
0.870s |
645.360us |
1 |
1 |
100.00 |
| V3 |
min_threshold |
aon_timer_smoke_min_thold |
0.990s |
592.724us |
1 |
1 |
100.00 |
| V3 |
wkup_count_hi_cdc |
aon_timer_wkup_count_cdc_hi |
5.750s |
3.410ms |
1 |
1 |
100.00 |
| V3 |
custom_intr |
aon_timer_custom_intr |
1.510s |
655.107us |
1 |
1 |
100.00 |
| V3 |
alternating_on_off |
aon_timer_alternating_enable_on_off |
6.240s |
3.898ms |
1 |
1 |
100.00 |
| V3 |
stress_all_with_rand_reset |
aon_timer_stress_all_with_rand_reset |
8.710s |
2.120ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
6 |
6 |
100.00 |
|
|
TOTAL |
|
|
23 |
23 |
100.00 |