| V1 |
smoke |
kmac_smoke |
3.420s |
479.818us |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
kmac_csr_hw_reset |
1.440s |
118.637us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
kmac_csr_rw |
1.170s |
18.458us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
kmac_csr_bit_bash |
6.070s |
1.043ms |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
kmac_csr_aliasing |
3.190s |
80.115us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
kmac_csr_mem_rw_with_rand_reset |
2.220s |
303.273us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
kmac_csr_rw |
1.170s |
18.458us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
3.190s |
80.115us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
kmac_mem_walk |
0.900s |
173.047us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
kmac_mem_partial_access |
1.350s |
59.542us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
long_msg_and_output |
kmac_long_msg_and_output |
3.961m |
39.154ms |
1 |
1 |
100.00 |
| V2 |
burst_write |
kmac_burst_write |
10.775m |
30.833ms |
1 |
1 |
100.00 |
| V2 |
test_vectors |
kmac_test_vectors_sha3_224 |
27.040s |
4.981ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_256 |
26.860s |
2.062ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_384 |
26.820s |
5.855ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_512 |
18.669m |
49.966ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_shake_128 |
2.290m |
30.051ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_shake_256 |
1.440m |
5.431ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_kmac |
2.640s |
226.087us |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_kmac_xof |
2.370s |
110.308us |
1 |
1 |
100.00 |
| V2 |
sideload |
kmac_sideload |
1.914m |
1.985ms |
1 |
1 |
100.00 |
| V2 |
app |
kmac_app |
4.119m |
21.514ms |
1 |
1 |
100.00 |
| V2 |
app_with_partial_data |
kmac_app_with_partial_data |
1.421m |
7.038ms |
1 |
1 |
100.00 |
| V2 |
entropy_refresh |
kmac_entropy_refresh |
4.413m |
16.218ms |
1 |
1 |
100.00 |
| V2 |
error |
kmac_error |
4.482m |
15.153ms |
1 |
1 |
100.00 |
| V2 |
key_error |
kmac_key_error |
9.150s |
1.676ms |
1 |
1 |
100.00 |
| V2 |
sideload_invalid |
kmac_sideload_invalid |
5.190s |
170.766us |
1 |
1 |
100.00 |
| V2 |
edn_timeout_error |
kmac_edn_timeout_error |
1.270s |
43.420us |
1 |
1 |
100.00 |
| V2 |
entropy_mode_error |
kmac_entropy_mode_error |
1.180s |
35.730us |
1 |
1 |
100.00 |
| V2 |
entropy_ready_error |
kmac_entropy_ready_error |
1.054m |
32.452ms |
1 |
1 |
100.00 |
| V2 |
lc_escalation |
kmac_lc_escalation |
1.630s |
83.900us |
1 |
1 |
100.00 |
| V2 |
stress_all |
kmac_stress_all |
3.909m |
100.094ms |
1 |
1 |
100.00 |
| V2 |
intr_test |
kmac_intr_test |
1.070s |
15.350us |
1 |
1 |
100.00 |
| V2 |
alert_test |
kmac_alert_test |
0.950s |
18.337us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
kmac_tl_errors |
2.770s |
131.936us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
kmac_tl_errors |
2.770s |
131.936us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
kmac_csr_hw_reset |
1.440s |
118.637us |
1 |
1 |
100.00 |
|
|
kmac_csr_rw |
1.170s |
18.458us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
3.190s |
80.115us |
1 |
1 |
100.00 |
|
|
kmac_same_csr_outstanding |
1.530s |
37.186us |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
kmac_csr_hw_reset |
1.440s |
118.637us |
1 |
1 |
100.00 |
|
|
kmac_csr_rw |
1.170s |
18.458us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
3.190s |
80.115us |
1 |
1 |
100.00 |
|
|
kmac_same_csr_outstanding |
1.530s |
37.186us |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
26 |
26 |
100.00 |
| V2S |
shadow_reg_update_error |
kmac_shadow_reg_errors |
1.700s |
166.390us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_read_clear_staged_value |
kmac_shadow_reg_errors |
1.700s |
166.390us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_storage_error |
kmac_shadow_reg_errors |
1.700s |
166.390us |
1 |
1 |
100.00 |
| V2S |
shadowed_reset_glitch |
kmac_shadow_reg_errors |
1.700s |
166.390us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_update_error_with_csr_rw |
kmac_shadow_reg_errors_with_csr_rw |
3.470s |
162.010us |
1 |
1 |
100.00 |
| V2S |
tl_intg_err |
kmac_sec_cm |
1.454m |
36.451ms |
1 |
1 |
100.00 |
|
|
kmac_tl_intg_err |
3.100s |
384.683us |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
kmac_tl_intg_err |
3.100s |
384.683us |
1 |
1 |
100.00 |
| V2S |
sec_cm_lc_escalate_en_intersig_mubi |
kmac_lc_escalation |
1.630s |
83.900us |
1 |
1 |
100.00 |
| V2S |
sec_cm_sw_key_key_masking |
kmac_smoke |
3.420s |
479.818us |
1 |
1 |
100.00 |
| V2S |
sec_cm_key_sideload |
kmac_sideload |
1.914m |
1.985ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_cfg_shadowed_config_shadow |
kmac_shadow_reg_errors |
1.700s |
166.390us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_sparse |
kmac_sec_cm |
1.454m |
36.451ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_ctr_redun |
kmac_sec_cm |
1.454m |
36.451ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_packer_ctr_redun |
kmac_sec_cm |
1.454m |
36.451ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_cfg_shadowed_config_regwen |
kmac_smoke |
3.420s |
479.818us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_global_esc |
kmac_lc_escalation |
1.630s |
83.900us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_local_esc |
kmac_sec_cm |
1.454m |
36.451ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_absorbed_ctrl_mubi |
kmac_mubi |
28.390s |
983.573us |
1 |
1 |
100.00 |
| V2S |
sec_cm_sw_cmd_ctrl_sparse |
kmac_smoke |
3.420s |
479.818us |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
5 |
5 |
100.00 |
| V3 |
stress_all_with_rand_reset |
kmac_stress_all_with_rand_reset |
42.280s |
1.004ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
1 |
1 |
100.00 |
|
|
TOTAL |
|
|
40 |
40 |
100.00 |