| V1 |
smoke |
kmac_smoke |
56.310s |
7.237ms |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
kmac_csr_hw_reset |
1.200s |
101.741us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
kmac_csr_rw |
1.200s |
19.583us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
kmac_csr_bit_bash |
14.150s |
10.643ms |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
kmac_csr_aliasing |
6.230s |
673.329us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
kmac_csr_mem_rw_with_rand_reset |
2.700s |
960.486us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
kmac_csr_rw |
1.200s |
19.583us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
6.230s |
673.329us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
kmac_mem_walk |
1.050s |
14.376us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
kmac_mem_partial_access |
1.420s |
34.256us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
long_msg_and_output |
kmac_long_msg_and_output |
10.245m |
42.728ms |
1 |
1 |
100.00 |
| V2 |
burst_write |
kmac_burst_write |
2.526m |
4.060ms |
1 |
1 |
100.00 |
| V2 |
test_vectors |
kmac_test_vectors_sha3_224 |
34.236m |
94.248ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_256 |
31.665m |
143.496ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_384 |
19.330m |
26.934ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_512 |
17.736m |
42.412ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_shake_128 |
2.611m |
8.494ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_shake_256 |
24.374m |
173.027ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_kmac |
1.890s |
196.660us |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_kmac_xof |
2.670s |
112.532us |
1 |
1 |
100.00 |
| V2 |
sideload |
kmac_sideload |
4.029m |
6.377ms |
1 |
1 |
100.00 |
| V2 |
app |
kmac_app |
55.990s |
1.929ms |
1 |
1 |
100.00 |
| V2 |
app_with_partial_data |
kmac_app_with_partial_data |
3.873m |
270.673ms |
1 |
1 |
100.00 |
| V2 |
entropy_refresh |
kmac_entropy_refresh |
2.436m |
2.516ms |
1 |
1 |
100.00 |
| V2 |
error |
kmac_error |
1.649m |
19.341ms |
1 |
1 |
100.00 |
| V2 |
key_error |
kmac_key_error |
4.050s |
688.354us |
1 |
1 |
100.00 |
| V2 |
sideload_invalid |
kmac_sideload_invalid |
1.900s |
53.442us |
1 |
1 |
100.00 |
| V2 |
edn_timeout_error |
kmac_edn_timeout_error |
2.940s |
245.609us |
1 |
1 |
100.00 |
| V2 |
entropy_mode_error |
kmac_entropy_mode_error |
22.080s |
777.385us |
1 |
1 |
100.00 |
| V2 |
entropy_ready_error |
kmac_entropy_ready_error |
37.240s |
4.400ms |
1 |
1 |
100.00 |
| V2 |
lc_escalation |
kmac_lc_escalation |
1.540s |
101.908us |
1 |
1 |
100.00 |
| V2 |
stress_all |
kmac_stress_all |
14.584m |
254.208ms |
1 |
1 |
100.00 |
| V2 |
intr_test |
kmac_intr_test |
0.810s |
48.108us |
1 |
1 |
100.00 |
| V2 |
alert_test |
kmac_alert_test |
1.090s |
113.137us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
kmac_tl_errors |
2.940s |
101.520us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
kmac_tl_errors |
2.940s |
101.520us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
kmac_csr_hw_reset |
1.200s |
101.741us |
1 |
1 |
100.00 |
|
|
kmac_csr_rw |
1.200s |
19.583us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
6.230s |
673.329us |
1 |
1 |
100.00 |
|
|
kmac_same_csr_outstanding |
1.440s |
105.864us |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
kmac_csr_hw_reset |
1.200s |
101.741us |
1 |
1 |
100.00 |
|
|
kmac_csr_rw |
1.200s |
19.583us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
6.230s |
673.329us |
1 |
1 |
100.00 |
|
|
kmac_same_csr_outstanding |
1.440s |
105.864us |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
26 |
26 |
100.00 |
| V2S |
shadow_reg_update_error |
kmac_shadow_reg_errors |
1.910s |
161.949us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_read_clear_staged_value |
kmac_shadow_reg_errors |
1.910s |
161.949us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_storage_error |
kmac_shadow_reg_errors |
1.910s |
161.949us |
1 |
1 |
100.00 |
| V2S |
shadowed_reset_glitch |
kmac_shadow_reg_errors |
1.910s |
161.949us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_update_error_with_csr_rw |
kmac_shadow_reg_errors_with_csr_rw |
2.690s |
127.372us |
1 |
1 |
100.00 |
| V2S |
tl_intg_err |
kmac_sec_cm |
35.830s |
3.465ms |
1 |
1 |
100.00 |
|
|
kmac_tl_intg_err |
3.720s |
1.021ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
kmac_tl_intg_err |
3.720s |
1.021ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_lc_escalate_en_intersig_mubi |
kmac_lc_escalation |
1.540s |
101.908us |
1 |
1 |
100.00 |
| V2S |
sec_cm_sw_key_key_masking |
kmac_smoke |
56.310s |
7.237ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_key_sideload |
kmac_sideload |
4.029m |
6.377ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_cfg_shadowed_config_shadow |
kmac_shadow_reg_errors |
1.910s |
161.949us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_sparse |
kmac_sec_cm |
35.830s |
3.465ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_ctr_redun |
kmac_sec_cm |
35.830s |
3.465ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_packer_ctr_redun |
kmac_sec_cm |
35.830s |
3.465ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_cfg_shadowed_config_regwen |
kmac_smoke |
56.310s |
7.237ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_global_esc |
kmac_lc_escalation |
1.540s |
101.908us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_local_esc |
kmac_sec_cm |
35.830s |
3.465ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_absorbed_ctrl_mubi |
kmac_mubi |
1.916m |
21.538ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_sw_cmd_ctrl_sparse |
kmac_smoke |
56.310s |
7.237ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
5 |
5 |
100.00 |
| V3 |
stress_all_with_rand_reset |
kmac_stress_all_with_rand_reset |
1.634m |
6.917ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
1 |
1 |
100.00 |
|
|
TOTAL |
|
|
40 |
40 |
100.00 |