SPI_DEVICE/1R1W Simulation Results

Wednesday October 01 2025 16:01:45 UTC

GitHub Revision: cd42e67

Branch: master

Testplan

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	spi_device_flash_and_tpm	3.897m	38.857ms	1	1	100.00
V1	csr_hw_reset	spi_device_csr_hw_reset	1.180s	61.164us	1	1	100.00
V1	csr_rw	spi_device_csr_rw	1.110s	24.696us	1	1	100.00
V1	csr_bit_bash	spi_device_csr_bit_bash	22.820s	3.058ms	1	1	100.00
V1	csr_aliasing	spi_device_csr_aliasing	5.660s	1.248ms	1	1	100.00
V1	csr_mem_rw_with_rand_reset	spi_device_csr_mem_rw_with_rand_reset	2.570s	301.400us	1	1	100.00
V1	regwen_csr_and_corresponding_lockable_csr	spi_device_csr_rw	1.110s	24.696us	1	1	100.00
		spi_device_csr_aliasing	5.660s	1.248ms	1	1	100.00
V1	mem_walk	spi_device_mem_walk	0.800s	23.872us	1	1	100.00
V1	mem_partial_access	spi_device_mem_partial_access	1.800s	112.395us	1	1	100.00
V1		TOTAL			8	8	100.00
V2	csb_read	spi_device_csb_read	0.970s	56.813us	1	1	100.00
V2	mem_parity	spi_device_mem_parity	0.900s	1.800us	0	1	0.00
V2	mem_cfg	spi_device_ram_cfg	0.760s	4.650us	0	1	0.00
V2	tpm_read	spi_device_tpm_rw	2.040s	176.170us	1	1	100.00
V2	tpm_write	spi_device_tpm_rw	2.040s	176.170us	1	1	100.00
V2	tpm_hw_reg	spi_device_tpm_read_hw_reg	3.330s	1.388ms	1	1	100.00
		spi_device_tpm_sts_read	0.870s	170.285us	1	1	100.00
V2	tpm_fully_random_case	spi_device_tpm_all	13.310s	12.903ms	1	1	100.00
V2	pass_cmd_filtering	spi_device_pass_cmd_filtering	2.130s	205.730us	1	1	100.00
		spi_device_flash_all	3.956m	49.764ms	1	1	100.00
V2	pass_addr_translation	spi_device_pass_addr_payload_swap	6.110s	828.532us	1	1	100.00
		spi_device_flash_all	3.956m	49.764ms	1	1	100.00
V2	pass_payload_translation	spi_device_pass_addr_payload_swap	6.110s	828.532us	1	1	100.00
		spi_device_flash_all	3.956m	49.764ms	1	1	100.00
V2	cmd_info_slots	spi_device_flash_all	3.956m	49.764ms	1	1	100.00
V2	cmd_read_status	spi_device_intercept	4.320s	708.131us	1	1	100.00
		spi_device_flash_all	3.956m	49.764ms	1	1	100.00
V2	cmd_read_jedec	spi_device_intercept	4.320s	708.131us	1	1	100.00
		spi_device_flash_all	3.956m	49.764ms	1	1	100.00
V2	cmd_read_sfdp	spi_device_intercept	4.320s	708.131us	1	1	100.00
		spi_device_flash_all	3.956m	49.764ms	1	1	100.00
V2	cmd_fast_read	spi_device_intercept	4.320s	708.131us	1	1	100.00
		spi_device_flash_all	3.956m	49.764ms	1	1	100.00
V2	cmd_read_pipeline	spi_device_intercept	4.320s	708.131us	1	1	100.00
		spi_device_flash_all	3.956m	49.764ms	1	1	100.00
V2	flash_cmd_upload	spi_device_upload	7.410s	2.860ms	1	1	100.00
V2	mailbox_command	spi_device_mailbox	1.920s	111.046us	1	1	100.00
V2	mailbox_cross_outside_command	spi_device_mailbox	1.920s	111.046us	1	1	100.00
V2	mailbox_cross_inside_command	spi_device_mailbox	1.920s	111.046us	1	1	100.00
V2	cmd_read_buffer	spi_device_flash_mode	2.740s	87.390us	1	1	100.00
		spi_device_read_buffer_direct	4.480s	2.313ms	1	1	100.00
V2	cmd_dummy_cycle	spi_device_mailbox	1.920s	111.046us	1	1	100.00
		spi_device_flash_all	3.956m	49.764ms	1	1	100.00
V2	quad_spi	spi_device_flash_all	3.956m	49.764ms	1	1	100.00
V2	dual_spi	spi_device_flash_all	3.956m	49.764ms	1	1	100.00
V2	4b_3b_feature	spi_device_cfg_cmd	3.930s	850.721us	1	1	100.00
V2	write_enable_disable	spi_device_cfg_cmd	3.930s	850.721us	1	1	100.00
V2	TPM_with_flash_or_passthrough_mode	spi_device_flash_and_tpm	3.897m	38.857ms	1	1	100.00
V2	tpm_and_flash_trans_with_min_inactive_time	spi_device_flash_and_tpm_min_idle	2.839m	195.310ms	1	1	100.00
V2	stress_all	spi_device_stress_all	1.063m	51.142ms	1	1	100.00
V2	alert_test	spi_device_alert_test	0.840s	36.776us	1	1	100.00
V2	intr_test	spi_device_intr_test	0.870s	13.144us	1	1	100.00
V2	tl_d_oob_addr_access	spi_device_tl_errors	4.210s	965.199us	1	1	100.00
V2	tl_d_illegal_access	spi_device_tl_errors	4.210s	965.199us	1	1	100.00
V2	tl_d_outstanding_access	spi_device_csr_hw_reset	1.180s	61.164us	1	1	100.00
		spi_device_csr_rw	1.110s	24.696us	1	1	100.00
		spi_device_csr_aliasing	5.660s	1.248ms	1	1	100.00
		spi_device_same_csr_outstanding	2.710s	591.656us	1	1	100.00
V2	tl_d_partial_access	spi_device_csr_hw_reset	1.180s	61.164us	1	1	100.00
		spi_device_csr_rw	1.110s	24.696us	1	1	100.00
		spi_device_csr_aliasing	5.660s	1.248ms	1	1	100.00
		spi_device_same_csr_outstanding	2.710s	591.656us	1	1	100.00
V2		TOTAL			20	22	90.91
V2S	tl_intg_err	spi_device_sec_cm	1.320s	100.975us	1	1	100.00
		spi_device_tl_intg_err	5.620s	331.736us	1	1	100.00
V2S	sec_cm_bus_integrity	spi_device_tl_intg_err	5.620s	331.736us	1	1	100.00
V2S		TOTAL			2	2	100.00
	Unmapped tests	spi_device_flash_mode_ignore_cmds	0.750s	14.291us	1	1	100.00
		TOTAL			31	33	93.94

Failure Buckets

• UVM_ERROR (uvm_hdl_vcs.c:1035) [UVM/DPI/HDL_SET] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[*]) has 1 failures:

  • Test spi_device_mem_parity has 1 failures.

    • 0.spi_device_mem_parity.50575032613634794354562374655596705348017010343368574145806243859601661463094
      Line 73, in log /nightly/current_run/scratch/master/spi_device_1r1w-sim-vcs/0.spi_device_mem_parity/latest/run.log

        UVM_ERROR @   1190264 ps: (uvm_hdl_vcs.c:1035) [UVM/DPI/HDL_SET] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[44])
         Either the name is incorrect, or you may not have PLI/ACC visibility to that name
        UVM_ERROR @   1190264 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))
        UVM_ERROR @   1190264 ps: (uvm_hdl_vcs.c:1185) [UVM/DPI/HDL_DEPOSIT] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[940])
         Either the name is incorrect, or you may not have PLI/ACC visibility to that name
      

• UVM_ERROR (spi_device_ram_cfg_vseq.sv:27) [spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (* [*] vs * [*]) has 1 failures:

  • Test spi_device_ram_cfg has 1 failures.

    • 0.spi_device_ram_cfg.7478203021472465172515663335943292971798410404111566391570219326877639769876
      Line 73, in log /nightly/current_run/scratch/master/spi_device_1r1w-sim-vcs/0.spi_device_ram_cfg/latest/run.log

        UVM_ERROR @   1812320 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x62606c [11000100110000001101100] vs 0x0 [0])
        UVM_ERROR @   1894320 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x561f84 [10101100001111110000100] vs 0x0 [0])
        UVM_ERROR @   1963320 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0xd8beff [110110001011111011111111] vs 0x0 [0])
        UVM_ERROR @   2038320 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x7e68b7 [11111100110100010110111] vs 0x0 [0])
        UVM_ERROR @   2130320 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0xec33d [11101100001100111101] vs 0x0 [0])