| V1 |
smoke |
aon_timer_smoke |
1.530s |
688.445us |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
aon_timer_csr_hw_reset |
1.700s |
831.071us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
aon_timer_csr_rw |
0.830s |
407.413us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
aon_timer_csr_bit_bash |
3.620s |
7.236ms |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
aon_timer_csr_aliasing |
1.280s |
498.615us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
aon_timer_csr_mem_rw_with_rand_reset |
1.540s |
527.930us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
aon_timer_csr_rw |
0.830s |
407.413us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.280s |
498.615us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
aon_timer_mem_walk |
0.730s |
375.249us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
aon_timer_mem_partial_access |
0.860s |
525.719us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
prescaler |
aon_timer_prescaler |
13.700s |
41.508ms |
1 |
1 |
100.00 |
| V2 |
jump |
aon_timer_jump |
1.250s |
700.321us |
1 |
1 |
100.00 |
| V2 |
stress_all |
aon_timer_stress_all |
17.220s |
15.609ms |
1 |
1 |
100.00 |
| V2 |
alert_test |
aon_timer_alert_test |
1.640s |
461.203us |
1 |
1 |
100.00 |
| V2 |
intr_test |
aon_timer_intr_test |
1.410s |
341.156us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
aon_timer_tl_errors |
2.290s |
390.981us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
aon_timer_tl_errors |
2.290s |
390.981us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
aon_timer_csr_hw_reset |
1.700s |
831.071us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
0.830s |
407.413us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.280s |
498.615us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
2.150s |
1.189ms |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
aon_timer_csr_hw_reset |
1.700s |
831.071us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
0.830s |
407.413us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.280s |
498.615us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
2.150s |
1.189ms |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
7 |
7 |
100.00 |
| V2S |
tl_intg_err |
aon_timer_sec_cm |
2.130s |
7.836ms |
1 |
1 |
100.00 |
|
|
aon_timer_tl_intg_err |
4.130s |
8.270ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
aon_timer_tl_intg_err |
4.130s |
8.270ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
2 |
2 |
100.00 |
| V3 |
max_threshold |
aon_timer_smoke_max_thold |
0.980s |
773.224us |
1 |
1 |
100.00 |
| V3 |
min_threshold |
aon_timer_smoke_min_thold |
1.250s |
574.324us |
1 |
1 |
100.00 |
| V3 |
wkup_count_hi_cdc |
aon_timer_wkup_count_cdc_hi |
7.740s |
3.726ms |
1 |
1 |
100.00 |
| V3 |
custom_intr |
aon_timer_custom_intr |
0.910s |
574.102us |
1 |
1 |
100.00 |
| V3 |
alternating_on_off |
aon_timer_alternating_enable_on_off |
6.680s |
4.112ms |
1 |
1 |
100.00 |
| V3 |
stress_all_with_rand_reset |
aon_timer_stress_all_with_rand_reset |
27.490s |
8.560ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
6 |
6 |
100.00 |
|
|
TOTAL |
|
|
23 |
23 |
100.00 |