KEYMGR_DPE Simulation Results

Thursday October 02 2025 16:01:20 UTC

GitHub Revision: dbeac2b

Branch: master

Testplan

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	keymgr_dpe_smoke	15.530s	1.241ms	1	1	100.00
V1	csr_hw_reset	keymgr_dpe_csr_hw_reset	0.940s	24.485us	1	1	100.00
V1	csr_rw	keymgr_dpe_csr_rw	1.000s	39.746us	1	1	100.00
V1	csr_bit_bash	keymgr_dpe_csr_bit_bash	6.070s	302.781us	1	1	100.00
V1	csr_aliasing	keymgr_dpe_csr_aliasing	3.660s	165.885us	1	1	100.00
V1	csr_mem_rw_with_rand_reset	keymgr_dpe_csr_mem_rw_with_rand_reset	1.380s	158.760us	1	1	100.00
V1	regwen_csr_and_corresponding_lockable_csr	keymgr_dpe_csr_rw	1.000s	39.746us	1	1	100.00
		keymgr_dpe_csr_aliasing	3.660s	165.885us	1	1	100.00
V1		TOTAL			6	6	100.00
V2	intr_test	keymgr_dpe_intr_test	0.800s	52.983us	1	1	100.00
V2	alert_test	keymgr_dpe_alert_test	0.820s	14.941us	1	1	100.00
V2	tl_d_oob_addr_access	keymgr_dpe_tl_errors	2.530s	417.807us	1	1	100.00
V2	tl_d_illegal_access	keymgr_dpe_tl_errors	2.530s	417.807us	1	1	100.00
V2	tl_d_outstanding_access	keymgr_dpe_csr_hw_reset	0.940s	24.485us	1	1	100.00
		keymgr_dpe_csr_rw	1.000s	39.746us	1	1	100.00
		keymgr_dpe_csr_aliasing	3.660s	165.885us	1	1	100.00
		keymgr_dpe_same_csr_outstanding	2.220s	205.629us	1	1	100.00
V2	tl_d_partial_access	keymgr_dpe_csr_hw_reset	0.940s	24.485us	1	1	100.00
		keymgr_dpe_csr_rw	1.000s	39.746us	1	1	100.00
		keymgr_dpe_csr_aliasing	3.660s	165.885us	1	1	100.00
		keymgr_dpe_same_csr_outstanding	2.220s	205.629us	1	1	100.00
V2		TOTAL			4	4	100.00
V2S	tl_intg_err	keymgr_dpe_sec_cm	4.120s	463.819us	1	1	100.00
		keymgr_dpe_tl_intg_err	2.580s	140.201us	1	1	100.00
V2S	shadow_reg_update_error	keymgr_dpe_shadow_reg_errors	1.200s	51.167us	1	1	100.00
V2S	shadow_reg_read_clear_staged_value	keymgr_dpe_shadow_reg_errors	1.200s	51.167us	1	1	100.00
V2S	shadow_reg_storage_error	keymgr_dpe_shadow_reg_errors	1.200s	51.167us	1	1	100.00
V2S	shadowed_reset_glitch	keymgr_dpe_shadow_reg_errors	1.200s	51.167us	1	1	100.00
V2S	shadow_reg_update_error_with_csr_rw	keymgr_dpe_shadow_reg_errors_with_csr_rw	2.260s	84.596us	1	1	100.00
V2S	prim_count_check	keymgr_dpe_sec_cm	4.120s	463.819us	1	1	100.00
V2S	prim_fsm_check	keymgr_dpe_sec_cm	4.120s	463.819us	1	1	100.00
V2S		TOTAL			4	4	100.00
		TOTAL			14	14	100.00