| V1 |
smoke |
kmac_smoke |
45.920s |
6.810ms |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
kmac_csr_hw_reset |
1.170s |
78.788us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
kmac_csr_rw |
0.930s |
66.574us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
kmac_csr_bit_bash |
16.830s |
6.003ms |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
kmac_csr_aliasing |
7.350s |
2.850ms |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
kmac_csr_mem_rw_with_rand_reset |
1.970s |
334.383us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
kmac_csr_rw |
0.930s |
66.574us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
7.350s |
2.850ms |
1 |
1 |
100.00 |
| V1 |
mem_walk |
kmac_mem_walk |
1.010s |
13.320us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
kmac_mem_partial_access |
1.460s |
117.024us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
long_msg_and_output |
kmac_long_msg_and_output |
31.028m |
298.226ms |
1 |
1 |
100.00 |
| V2 |
burst_write |
kmac_burst_write |
8.678m |
29.058ms |
1 |
1 |
100.00 |
| V2 |
test_vectors |
kmac_test_vectors_sha3_224 |
34.930s |
2.791ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_256 |
33.630s |
2.669ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_384 |
19.010s |
6.381ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_512 |
16.135m |
32.474ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_shake_128 |
36.354m |
247.125ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_shake_256 |
30.091m |
250.738ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_kmac |
2.360s |
97.174us |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_kmac_xof |
2.260s |
43.053us |
1 |
1 |
100.00 |
| V2 |
sideload |
kmac_sideload |
5.355m |
13.075ms |
1 |
1 |
100.00 |
| V2 |
app |
kmac_app |
2.941m |
8.287ms |
1 |
1 |
100.00 |
| V2 |
app_with_partial_data |
kmac_app_with_partial_data |
35.370s |
1.513ms |
1 |
1 |
100.00 |
| V2 |
entropy_refresh |
kmac_entropy_refresh |
3.290m |
12.824ms |
1 |
1 |
100.00 |
| V2 |
error |
kmac_error |
47.480s |
25.518ms |
1 |
1 |
100.00 |
| V2 |
key_error |
kmac_key_error |
4.750s |
6.036ms |
1 |
1 |
100.00 |
| V2 |
sideload_invalid |
kmac_sideload_invalid |
5.410s |
370.529us |
1 |
1 |
100.00 |
| V2 |
edn_timeout_error |
kmac_edn_timeout_error |
31.160s |
5.645ms |
1 |
1 |
100.00 |
| V2 |
entropy_mode_error |
kmac_entropy_mode_error |
1.740s |
478.568us |
1 |
1 |
100.00 |
| V2 |
entropy_ready_error |
kmac_entropy_ready_error |
53.550s |
6.780ms |
1 |
1 |
100.00 |
| V2 |
lc_escalation |
kmac_lc_escalation |
1.920s |
44.651us |
1 |
1 |
100.00 |
| V2 |
stress_all |
kmac_stress_all |
9.524m |
47.316ms |
1 |
1 |
100.00 |
| V2 |
intr_test |
kmac_intr_test |
1.040s |
54.690us |
1 |
1 |
100.00 |
| V2 |
alert_test |
kmac_alert_test |
1.190s |
95.855us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
kmac_tl_errors |
1.790s |
136.888us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
kmac_tl_errors |
1.790s |
136.888us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
kmac_csr_hw_reset |
1.170s |
78.788us |
1 |
1 |
100.00 |
|
|
kmac_csr_rw |
0.930s |
66.574us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
7.350s |
2.850ms |
1 |
1 |
100.00 |
|
|
kmac_same_csr_outstanding |
1.610s |
87.129us |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
kmac_csr_hw_reset |
1.170s |
78.788us |
1 |
1 |
100.00 |
|
|
kmac_csr_rw |
0.930s |
66.574us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
7.350s |
2.850ms |
1 |
1 |
100.00 |
|
|
kmac_same_csr_outstanding |
1.610s |
87.129us |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
26 |
26 |
100.00 |
| V2S |
shadow_reg_update_error |
kmac_shadow_reg_errors |
1.590s |
129.049us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_read_clear_staged_value |
kmac_shadow_reg_errors |
1.590s |
129.049us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_storage_error |
kmac_shadow_reg_errors |
1.590s |
129.049us |
1 |
1 |
100.00 |
| V2S |
shadowed_reset_glitch |
kmac_shadow_reg_errors |
1.590s |
129.049us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_update_error_with_csr_rw |
kmac_shadow_reg_errors_with_csr_rw |
4.720s |
1.451ms |
1 |
1 |
100.00 |
| V2S |
tl_intg_err |
kmac_sec_cm |
1.150m |
38.165ms |
1 |
1 |
100.00 |
|
|
kmac_tl_intg_err |
2.540s |
126.310us |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
kmac_tl_intg_err |
2.540s |
126.310us |
1 |
1 |
100.00 |
| V2S |
sec_cm_lc_escalate_en_intersig_mubi |
kmac_lc_escalation |
1.920s |
44.651us |
1 |
1 |
100.00 |
| V2S |
sec_cm_sw_key_key_masking |
kmac_smoke |
45.920s |
6.810ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_key_sideload |
kmac_sideload |
5.355m |
13.075ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_cfg_shadowed_config_shadow |
kmac_shadow_reg_errors |
1.590s |
129.049us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_sparse |
kmac_sec_cm |
1.150m |
38.165ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_ctr_redun |
kmac_sec_cm |
1.150m |
38.165ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_packer_ctr_redun |
kmac_sec_cm |
1.150m |
38.165ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_cfg_shadowed_config_regwen |
kmac_smoke |
45.920s |
6.810ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_global_esc |
kmac_lc_escalation |
1.920s |
44.651us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_local_esc |
kmac_sec_cm |
1.150m |
38.165ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_absorbed_ctrl_mubi |
kmac_mubi |
39.850s |
5.400ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_sw_cmd_ctrl_sparse |
kmac_smoke |
45.920s |
6.810ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
5 |
5 |
100.00 |
| V3 |
stress_all_with_rand_reset |
kmac_stress_all_with_rand_reset |
1.382m |
3.799ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
1 |
1 |
100.00 |
|
|
TOTAL |
|
|
40 |
40 |
100.00 |