MBX Simulation Results

Thursday October 02 2025 16:01:20 UTC

GitHub Revision: dbeac2b

Branch: master

Testplan

Simulator: XCELIUM

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 mbx_smoke mbx_smoke 48.000s 7.572ms 1 1 100.00
V1 csr_hw_reset mbx_csr_hw_reset 1.000s 32.008us 1 1 100.00
V1 csr_rw mbx_csr_rw 2.000s 38.942us 1 1 100.00
V1 csr_bit_bash mbx_csr_bit_bash 3.000s 216.432us 1 1 100.00
V1 csr_aliasing mbx_csr_aliasing 1.000s 18.871us 1 1 100.00
V1 csr_mem_rw_with_rand_reset mbx_csr_mem_rw_with_rand_reset 2.000s 98.264us 1 1 100.00
V1 regwen_csr_and_corresponding_lockable_csr mbx_csr_rw 2.000s 38.942us 1 1 100.00
mbx_csr_aliasing 1.000s 18.871us 1 1 100.00
V1 TOTAL 6 6 100.00
V2 mbx_stress mbx_stress 29.000s 9.174ms 1 1 100.00
V2 mbx_max_activity mbx_stress_zero_delays 48.000s 2.941ms 1 1 100.00
V2 mbx_imbx_oob mbx_imbx_oob 38.000s 17.245ms 0 1 0.00
V2 mbx_doe_intr_msg mbx_doe_intr_msg 18.000s 1.384ms 1 1 100.00
V2 alert_test mbx_alert_test 2.000s 66.949us 1 1 100.00
V2 intr_test mbx_intr_test 1.000s 11.154us 1 1 100.00
V2 tl_d_oob_addr_access mbx_tl_errors 3.000s 46.245us 1 1 100.00
V2 tl_d_illegal_access mbx_tl_errors 3.000s 46.245us 1 1 100.00
V2 tl_d_outstanding_access mbx_csr_hw_reset 1.000s 32.008us 1 1 100.00
mbx_csr_rw 2.000s 38.942us 1 1 100.00
mbx_csr_aliasing 1.000s 18.871us 1 1 100.00
mbx_same_csr_outstanding 1.000s 70.870us 1 1 100.00
V2 tl_d_partial_access mbx_csr_hw_reset 1.000s 32.008us 1 1 100.00
mbx_csr_rw 2.000s 38.942us 1 1 100.00
mbx_csr_aliasing 1.000s 18.871us 1 1 100.00
mbx_same_csr_outstanding 1.000s 70.870us 1 1 100.00
V2 TOTAL 7 8 87.50
V2S tl_intg_err mbx_tl_intg_err 2.000s 468.119us 1 1 100.00
mbx_sec_cm 1.000s 32.513us 1 1 100.00
V2S TOTAL 2 2 100.00
TOTAL 15 16 93.75

Failure Buckets