MBX Simulation Results

Tuesday October 07 2025 16:07:43 UTC

GitHub Revision: 0f6fcf0

Branch: master

Testplan

Simulator: XCELIUM

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	mbx_smoke	mbx_smoke	33.000s	5.622ms	1	1	100.00
V1	csr_hw_reset	mbx_csr_hw_reset	2.000s	64.916us	1	1	100.00
V1	csr_rw	mbx_csr_rw	1.000s	13.467us	1	1	100.00
V1	csr_bit_bash	mbx_csr_bit_bash	2.000s	632.042us	1	1	100.00
V1	csr_aliasing	mbx_csr_aliasing	1.000s	47.496us	1	1	100.00
V1	csr_mem_rw_with_rand_reset	mbx_csr_mem_rw_with_rand_reset	1.000s	28.308us	1	1	100.00
V1	regwen_csr_and_corresponding_lockable_csr	mbx_csr_rw	1.000s	13.467us	1	1	100.00
		mbx_csr_aliasing	1.000s	47.496us	1	1	100.00
V1		TOTAL			6	6	100.00
V2	mbx_stress	mbx_stress	3.000s	394.411us	0	1	0.00
V2	mbx_max_activity	mbx_stress_zero_delays	3.000s	126.439us	0	1	0.00
V2	mbx_imbx_oob	mbx_imbx_oob	30.000s	7.101ms	1	1	100.00
V2	mbx_doe_intr_msg	mbx_doe_intr_msg	11.000s	711.482us	1	1	100.00
V2	alert_test	mbx_alert_test	1.000s	83.554us	1	1	100.00
V2	intr_test	mbx_intr_test	1.000s	39.150us	1	1	100.00
V2	tl_d_oob_addr_access	mbx_tl_errors	4.000s	438.202us	1	1	100.00
V2	tl_d_illegal_access	mbx_tl_errors	4.000s	438.202us	1	1	100.00
V2	tl_d_outstanding_access	mbx_csr_hw_reset	2.000s	64.916us	1	1	100.00
		mbx_csr_rw	1.000s	13.467us	1	1	100.00
		mbx_csr_aliasing	1.000s	47.496us	1	1	100.00
		mbx_same_csr_outstanding	2.000s	19.845us	1	1	100.00
V2	tl_d_partial_access	mbx_csr_hw_reset	2.000s	64.916us	1	1	100.00
		mbx_csr_rw	1.000s	13.467us	1	1	100.00
		mbx_csr_aliasing	1.000s	47.496us	1	1	100.00
		mbx_same_csr_outstanding	2.000s	19.845us	1	1	100.00
V2		TOTAL			6	8	75.00
V2S	tl_intg_err	mbx_tl_intg_err	1.000s	88.023us	1	1	100.00
		mbx_sec_cm	2.000s	60.874us	1	1	100.00
V2S		TOTAL			2	2	100.00
		TOTAL			14	16	87.50

Failure Buckets

• UVM_ERROR (mbx_scoreboard.sv:537) [scoreboard] Check failed m_ib_data_q.size() != * (* [*] vs * [*]) No write data in WDATA register has 2 failures:

  • Test mbx_stress has 1 failures.

    • 0.mbx_stress.82261748169789582578111025874135591310458144264386403955261329737059647084575
      Line 86, in log /nightly/current_run/scratch/master/mbx-sim-xcelium/0.mbx_stress/latest/run.log

        UVM_ERROR @ 394410632 ps: (mbx_scoreboard.sv:537) [uvm_test_top.env.scoreboard] Check failed m_ib_data_q.size() != 0 (0 [0x0] vs 0 [0x0]) No write data in WDATA register
        UVM_INFO @ 394410632 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

  • Test mbx_stress_zero_delays has 1 failures.

    • 0.mbx_stress_zero_delays.87054946704386251873728850437167648277178271980251911695532760128219262241497
      Line 86, in log /nightly/current_run/scratch/master/mbx-sim-xcelium/0.mbx_stress_zero_delays/latest/run.log

        UVM_ERROR @ 126439350 ps: (mbx_scoreboard.sv:537) [uvm_test_top.env.scoreboard] Check failed m_ib_data_q.size() != 0 (0 [0x0] vs 0 [0x0]) No write data in WDATA register
        UVM_INFO @ 126439350 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---