SPI_DEVICE/1R1W Simulation Results

Tuesday October 07 2025 16:07:43 UTC

GitHub Revision: 0f6fcf0

Branch: master

Testplan

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	spi_device_flash_and_tpm	3.201m	30.437ms	1	1	100.00
V1	csr_hw_reset	spi_device_csr_hw_reset	1.120s	44.348us	1	1	100.00
V1	csr_rw	spi_device_csr_rw	1.680s	69.493us	1	1	100.00
V1	csr_bit_bash	spi_device_csr_bit_bash	22.780s	537.385us	1	1	100.00
V1	csr_aliasing	spi_device_csr_aliasing	14.140s	1.202ms	1	1	100.00
V1	csr_mem_rw_with_rand_reset	spi_device_csr_mem_rw_with_rand_reset	2.660s	98.178us	1	1	100.00
V1	regwen_csr_and_corresponding_lockable_csr	spi_device_csr_rw	1.680s	69.493us	1	1	100.00
		spi_device_csr_aliasing	14.140s	1.202ms	1	1	100.00
V1	mem_walk	spi_device_mem_walk	0.790s	13.129us	1	1	100.00
V1	mem_partial_access	spi_device_mem_partial_access	1.320s	48.768us	1	1	100.00
V1		TOTAL			8	8	100.00
V2	csb_read	spi_device_csb_read	0.920s	49.182us	1	1	100.00
V2	mem_parity	spi_device_mem_parity	0.950s	7.587us	0	1	0.00
V2	mem_cfg	spi_device_ram_cfg	0.660s	31.401us	0	1	0.00
V2	tpm_read	spi_device_tpm_rw	2.580s	211.024us	1	1	100.00
V2	tpm_write	spi_device_tpm_rw	2.580s	211.024us	1	1	100.00
V2	tpm_hw_reg	spi_device_tpm_read_hw_reg	4.300s	5.111ms	1	1	100.00
		spi_device_tpm_sts_read	0.820s	36.748us	1	1	100.00
V2	tpm_fully_random_case	spi_device_tpm_all	3.270s	1.629ms	1	1	100.00
V2	pass_cmd_filtering	spi_device_pass_cmd_filtering	10.350s	18.224ms	1	1	100.00
		spi_device_flash_all	3.614m	46.158ms	1	1	100.00
V2	pass_addr_translation	spi_device_pass_addr_payload_swap	2.000s	62.017us	1	1	100.00
		spi_device_flash_all	3.614m	46.158ms	1	1	100.00
V2	pass_payload_translation	spi_device_pass_addr_payload_swap	2.000s	62.017us	1	1	100.00
		spi_device_flash_all	3.614m	46.158ms	1	1	100.00
V2	cmd_info_slots	spi_device_flash_all	3.614m	46.158ms	1	1	100.00
V2	cmd_read_status	spi_device_intercept	2.560s	897.602us	1	1	100.00
		spi_device_flash_all	3.614m	46.158ms	1	1	100.00
V2	cmd_read_jedec	spi_device_intercept	2.560s	897.602us	1	1	100.00
		spi_device_flash_all	3.614m	46.158ms	1	1	100.00
V2	cmd_read_sfdp	spi_device_intercept	2.560s	897.602us	1	1	100.00
		spi_device_flash_all	3.614m	46.158ms	1	1	100.00
V2	cmd_fast_read	spi_device_intercept	2.560s	897.602us	1	1	100.00
		spi_device_flash_all	3.614m	46.158ms	1	1	100.00
V2	cmd_read_pipeline	spi_device_intercept	2.560s	897.602us	1	1	100.00
		spi_device_flash_all	3.614m	46.158ms	1	1	100.00
V2	flash_cmd_upload	spi_device_upload	2.450s	92.443us	1	1	100.00
V2	mailbox_command	spi_device_mailbox	20.980s	3.022ms	1	1	100.00
V2	mailbox_cross_outside_command	spi_device_mailbox	20.980s	3.022ms	1	1	100.00
V2	mailbox_cross_inside_command	spi_device_mailbox	20.980s	3.022ms	1	1	100.00
V2	cmd_read_buffer	spi_device_flash_mode	22.510s	3.428ms	1	1	100.00
		spi_device_read_buffer_direct	9.780s	3.695ms	1	1	100.00
V2	cmd_dummy_cycle	spi_device_mailbox	20.980s	3.022ms	1	1	100.00
		spi_device_flash_all	3.614m	46.158ms	1	1	100.00
V2	quad_spi	spi_device_flash_all	3.614m	46.158ms	1	1	100.00
V2	dual_spi	spi_device_flash_all	3.614m	46.158ms	1	1	100.00
V2	4b_3b_feature	spi_device_cfg_cmd	4.560s	4.065ms	1	1	100.00
V2	write_enable_disable	spi_device_cfg_cmd	4.560s	4.065ms	1	1	100.00
V2	TPM_with_flash_or_passthrough_mode	spi_device_flash_and_tpm	3.201m	30.437ms	1	1	100.00
V2	tpm_and_flash_trans_with_min_inactive_time	spi_device_flash_and_tpm_min_idle	1.365m	10.286ms	1	1	100.00
V2	stress_all	spi_device_stress_all	2.463m	34.304ms	1	1	100.00
V2	alert_test	spi_device_alert_test	0.780s	23.433us	1	1	100.00
V2	intr_test	spi_device_intr_test	1.020s	16.253us	1	1	100.00
V2	tl_d_oob_addr_access	spi_device_tl_errors	4.430s	453.246us	1	1	100.00
V2	tl_d_illegal_access	spi_device_tl_errors	4.430s	453.246us	1	1	100.00
V2	tl_d_outstanding_access	spi_device_csr_hw_reset	1.120s	44.348us	1	1	100.00
		spi_device_csr_rw	1.680s	69.493us	1	1	100.00
		spi_device_csr_aliasing	14.140s	1.202ms	1	1	100.00
		spi_device_same_csr_outstanding	2.370s	239.066us	1	1	100.00
V2	tl_d_partial_access	spi_device_csr_hw_reset	1.120s	44.348us	1	1	100.00
		spi_device_csr_rw	1.680s	69.493us	1	1	100.00
		spi_device_csr_aliasing	14.140s	1.202ms	1	1	100.00
		spi_device_same_csr_outstanding	2.370s	239.066us	1	1	100.00
V2		TOTAL			20	22	90.91
V2S	tl_intg_err	spi_device_sec_cm	1.240s	183.549us	1	1	100.00
		spi_device_tl_intg_err	10.050s	198.646us	1	1	100.00
V2S	sec_cm_bus_integrity	spi_device_tl_intg_err	10.050s	198.646us	1	1	100.00
V2S		TOTAL			2	2	100.00
	Unmapped tests	spi_device_flash_mode_ignore_cmds	6.040s	1.329ms	1	1	100.00
		TOTAL			31	33	93.94

Failure Buckets

• UVM_ERROR (uvm_hdl_vcs.c:1035) [UVM/DPI/HDL_SET] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[*]) has 1 failures:

  • Test spi_device_mem_parity has 1 failures.

    • 0.spi_device_mem_parity.58126072126943075401208497593073941284075942580824213853741177464843155686512
      Line 73, in log /nightly/current_run/scratch/master/spi_device_1r1w-sim-vcs/0.spi_device_mem_parity/latest/run.log

        UVM_ERROR @   6528378 ps: (uvm_hdl_vcs.c:1035) [UVM/DPI/HDL_SET] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[64])
         Either the name is incorrect, or you may not have PLI/ACC visibility to that name
        UVM_ERROR @   6528378 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data))
        UVM_ERROR @   6528378 ps: (uvm_hdl_vcs.c:1185) [UVM/DPI/HDL_DEPOSIT] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[960])
         Either the name is incorrect, or you may not have PLI/ACC visibility to that name
      

• UVM_ERROR (spi_device_ram_cfg_vseq.sv:27) [spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (* [*] vs * [*]) has 1 failures:

  • Test spi_device_ram_cfg has 1 failures.

    • 0.spi_device_ram_cfg.32117152274551490464147429873374222501592472072645250316609975053817950978649
      Line 73, in log /nightly/current_run/scratch/master/spi_device_1r1w-sim-vcs/0.spi_device_ram_cfg/latest/run.log

        UVM_ERROR @  28742419 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x24edae [1001001110110110101110] vs 0x0 [0])
        UVM_ERROR @  28764419 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x8df15a [100011011111000101011010] vs 0x0 [0])
        UVM_ERROR @  28859419 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0xfd9e8d [111111011001111010001101] vs 0x0 [0])
        UVM_ERROR @  28884419 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x7665a1 [11101100110010110100001] vs 0x0 [0])
        UVM_ERROR @  28969419 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0xd569bd [110101010110100110111101] vs 0x0 [0])