| V1 |
smoke |
aon_timer_smoke |
2.260s |
644.028us |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
aon_timer_csr_hw_reset |
0.820s |
1.163ms |
1 |
1 |
100.00 |
| V1 |
csr_rw |
aon_timer_csr_rw |
0.790s |
463.651us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
aon_timer_csr_bit_bash |
5.580s |
14.003ms |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
aon_timer_csr_aliasing |
1.140s |
640.522us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
aon_timer_csr_mem_rw_with_rand_reset |
1.270s |
330.342us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
aon_timer_csr_rw |
0.790s |
463.651us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.140s |
640.522us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
aon_timer_mem_walk |
1.590s |
407.198us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
aon_timer_mem_partial_access |
0.780s |
585.689us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
prescaler |
aon_timer_prescaler |
34.360s |
31.559ms |
1 |
1 |
100.00 |
| V2 |
jump |
aon_timer_jump |
1.210s |
778.465us |
1 |
1 |
100.00 |
| V2 |
stress_all |
aon_timer_stress_all |
1.010m |
50.625ms |
1 |
1 |
100.00 |
| V2 |
alert_test |
aon_timer_alert_test |
0.850s |
468.288us |
1 |
1 |
100.00 |
| V2 |
intr_test |
aon_timer_intr_test |
0.960s |
369.757us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
aon_timer_tl_errors |
1.910s |
641.296us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
aon_timer_tl_errors |
1.910s |
641.296us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
aon_timer_csr_hw_reset |
0.820s |
1.163ms |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
0.790s |
463.651us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.140s |
640.522us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
1.460s |
1.381ms |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
aon_timer_csr_hw_reset |
0.820s |
1.163ms |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
0.790s |
463.651us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.140s |
640.522us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
1.460s |
1.381ms |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
7 |
7 |
100.00 |
| V2S |
tl_intg_err |
aon_timer_sec_cm |
6.360s |
4.565ms |
1 |
1 |
100.00 |
|
|
aon_timer_tl_intg_err |
3.540s |
8.362ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
aon_timer_tl_intg_err |
3.540s |
8.362ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
2 |
2 |
100.00 |
| V3 |
max_threshold |
aon_timer_smoke_max_thold |
0.800s |
702.807us |
1 |
1 |
100.00 |
| V3 |
min_threshold |
aon_timer_smoke_min_thold |
1.130s |
578.719us |
1 |
1 |
100.00 |
| V3 |
wkup_count_hi_cdc |
aon_timer_wkup_count_cdc_hi |
2.200s |
3.739ms |
1 |
1 |
100.00 |
| V3 |
custom_intr |
aon_timer_custom_intr |
1.040s |
551.511us |
1 |
1 |
100.00 |
| V3 |
alternating_on_off |
aon_timer_alternating_enable_on_off |
3.750s |
3.930ms |
1 |
1 |
100.00 |
| V3 |
stress_all_with_rand_reset |
aon_timer_stress_all_with_rand_reset |
16.340s |
6.148ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
6 |
6 |
100.00 |
|
|
TOTAL |
|
|
23 |
23 |
100.00 |