MBX Simulation Results

Monday October 13 2025 16:01:27 UTC

GitHub Revision: 49342f8

Branch: master

Testplan

Simulator: XCELIUM

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	mbx_smoke	mbx_smoke	51.000s	14.551ms	1	1	100.00
V1	csr_hw_reset	mbx_csr_hw_reset	6.000s	27.700us	1	1	100.00
V1	csr_rw	mbx_csr_rw	6.000s	16.471us	1	1	100.00
V1	csr_bit_bash	mbx_csr_bit_bash	6.000s	300.195us	1	1	100.00
V1	csr_aliasing	mbx_csr_aliasing	5.000s	29.976us	1	1	100.00
V1	csr_mem_rw_with_rand_reset	mbx_csr_mem_rw_with_rand_reset	2.000s	78.288us	1	1	100.00
V1	regwen_csr_and_corresponding_lockable_csr	mbx_csr_rw	6.000s	16.471us	1	1	100.00
		mbx_csr_aliasing	5.000s	29.976us	1	1	100.00
V1		TOTAL			6	6	100.00
V2	mbx_stress	mbx_stress	2.200m	27.167ms	1	1	100.00
V2	mbx_max_activity	mbx_stress_zero_delays	7.000s	155.845us	0	1	0.00
V2	mbx_imbx_oob	mbx_imbx_oob	19.000s	9.547ms	1	1	100.00
V2	mbx_doe_intr_msg	mbx_doe_intr_msg	12.000s	10.667ms	1	1	100.00
V2	alert_test	mbx_alert_test	2.000s	16.527us	1	1	100.00
V2	intr_test	mbx_intr_test	7.000s	38.463us	1	1	100.00
V2	tl_d_oob_addr_access	mbx_tl_errors	11.000s	119.483us	1	1	100.00
V2	tl_d_illegal_access	mbx_tl_errors	11.000s	119.483us	1	1	100.00
V2	tl_d_outstanding_access	mbx_csr_hw_reset	6.000s	27.700us	1	1	100.00
		mbx_csr_rw	6.000s	16.471us	1	1	100.00
		mbx_csr_aliasing	5.000s	29.976us	1	1	100.00
		mbx_same_csr_outstanding	2.000s	29.441us	1	1	100.00
V2	tl_d_partial_access	mbx_csr_hw_reset	6.000s	27.700us	1	1	100.00
		mbx_csr_rw	6.000s	16.471us	1	1	100.00
		mbx_csr_aliasing	5.000s	29.976us	1	1	100.00
		mbx_same_csr_outstanding	2.000s	29.441us	1	1	100.00
V2		TOTAL			7	8	87.50
V2S	tl_intg_err	mbx_tl_intg_err	9.000s	159.459us	1	1	100.00
		mbx_sec_cm	1.000s	13.984us	1	1	100.00
V2S		TOTAL			2	2	100.00
		TOTAL			15	16	93.75

Failure Buckets

• UVM_ERROR (mbx_scoreboard.sv:537) [scoreboard] Check failed m_ib_data_q.size() != * (* [*] vs * [*]) No write data in WDATA register has 1 failures:
  • Test mbx_stress_zero_delays has 1 failures.

    • 0.mbx_stress_zero_delays.80630337421147822293875600617348407659908137472379699899653258815437259125053
      Line 86, in log /nightly/current_run/scratch/master/mbx-sim-xcelium/0.mbx_stress_zero_delays/latest/run.log

        UVM_ERROR @ 155845236 ps: (mbx_scoreboard.sv:537) [uvm_test_top.env.scoreboard] Check failed m_ib_data_q.size() != 0 (0 [0x0] vs 0 [0x0]) No write data in WDATA register
        UVM_INFO @ 155845236 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---